SDAA087 September   2025 AM62P

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Board Design and Layout Guidance
    1. 2.1 General Board Design Guidance
    2. 2.2 Additional Board Design Guidelines for Signal Integrity
    3. 2.3 Design Example
  6. 3Board Design Simulations
    1. 3.1 Board Model Extraction
      1. 3.1.1 IBIS Model Simulations
    2. 3.2 Simulation Setup
  7. 4Summary
  8. 5References

Additional Board Design Guidelines for Signal Integrity

  • Several factors contribute to signal integrity, and this is a system level optimization challenge.
  • Various options exist to fix signal quality. Suggested options are listed in Signal Quality Options.
Table 2-1 Signal Quality Options
Options Recommendation How does this help?
A Add series termination Helps reduce reflections and helps with better signal quality.
B Add load cap Helps reduce the return reflections. Balancing cap on both ends reduces the overall reflections.
C Increase in trace length Prevent the out-of-phase reflection from impacting the incident signal while the signal is still transitioning.
D Increase drive strength and combination of A, B, C Better rise/fall and improves overall eye along with a combination of A, B, C to reduce reflections.
 Series Termination Added on Data
          Lines Figure 2-1 Series Termination Added on Data Lines
 Load Capacitor Added on Clock Figure 2-2 Load Capacitor Added on Clock
 Combination of A and B on Data
          Lines Figure 2-3 Combination of A and B on Data Lines