To verify good signaling performance, the following general board design guidelines must be followed:

• All signals need ground reference (strongly suggest on both sides).
• Avoid crossing plane splits in the signal reference planes.
• Use the widest trace that is practical between the decoupling capacitors and the supply pin.
• Minimize inter-symbol interference (ISI) by keeping impedance matched.
• Minimize crosstalk by isolating sensitive signals, such as strobes and clocks, and by using a proper PCB stack-up.
• Avoid return path discontinuities by adding stitching vias whenever signals change layers and reference planes.
• Minimize reference voltage noise through proper isolation and proper use of decoupling capacitors.
• Keep the signal routing stub lengths as short as possible.
• Add additional spacing for clock and strobe nets to minimize crosstalk.
• Maintain a common ground (also called GND) reference for all signals and for all bypass and decoupling capacitors.
• Consider the differences in propagation delays between microstrip and stripline nets when evaluating timing constraints.
• Via-to-via coupling can be significant part of PCB-level crosstalk. Dimension and pitch of vias is important. For high speed interfaces, consider GND shielding vias. This via coupling is one factor for recommending data signals be routed on layers closest to processor.
• Via stubs affect signal integrity. Via back-drilling can improve signal integrity and is required in some instances.