The board level extraction guidelines listed below are intended to work in any EDA extraction tool and are not tool-specific. Follow the steps outlined in Section 3.2 immediately after completing extraction of s-parameter. The design must be checked with these steps prior to running IBIS simulations.

• For signal extractions, a 2.5D extraction is sufficient.
• Check the board stack-up for accurate layer thickness and material properties.
• If the board layout is cut prior to extraction (to reduce simulation time), then define a cut boundary that is at least 0.25 inch away from the signal and power nets.
• Use s-parameter or RLC package models (typically available from the vendor) for further simulation.