SDAA378 August   2026 ADS125H18

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Detailed Description
    1. 2.1 Understanding ADS125H18 OWCS Operation
    2. 2.2 Using OWCS with Single-Ended Input Signals
      1. 2.2.1 Analyzing OWCS Behavior for Single-Ended Input Signals
      2. 2.2.2 Verifying OWCS Operation with a Single-Ended Input Using the ADS125H18EVM
        1. 2.2.2.1 Verifying OWCS Operation with a Single-Ended Input
        2. 2.2.2.2 Using a Fewer Number of Conversions for OWCS with a Single-Ended Input
          1. 2.2.2.2.1 Unsettled Data for Single-Ended Inputs
          2. 2.2.2.2.2 Settled Data for Single-Ended Inputs
        3. 2.2.2.3 How Input Capacitance Affects OWCS Performance for Single-Ended Inputs
        4. 2.2.2.4 Using the ADS125H18 Programmable Delay to Mitigate Settling Effects for Single-Ended Inputs
    3. 2.3 Using OWCS with Differential Input Signals
      1. 2.3.1 Analyzing OWCS Behavior for Differential Input Signals
      2. 2.3.2 Verifying OWCS Operation with a Differential Input Using the ADS125H18EVM
        1. 2.3.2.1 Verifying OWCS Operation with a Differential Input
        2. 2.3.2.2 Using a Fewer Number of Conversions for OWCS with a Differential Input
          1. 2.3.2.2.1 Unsettled Data for Differential Inputs
          2. 2.3.2.2.2 Settled Data for Differential Inputs
        3. 2.3.2.3 How Input Capacitance Affects OWCS Performance for Differential Inputs
          1. 2.3.2.3.1 Back-to-Back, Differential OWCS Measurements with Input Capacitance
        4. 2.3.2.4 Using the ADS125H18 Programmable Delay to Mitigate Settling Effects for Differential Inputs
    4. 2.4 Using the ADS125H18 Channel Sequencer to Implement an OWCS Algorithm
      1. 2.4.1 Example: Configuring the ADS125H18 Sequencer for the OWCS Algorithm
      2. 2.4.2 Understanding the OWCS Algorithm in the ADS125H18 Example Code
        1. 2.4.2.1 Initialization
          1. 2.4.2.1.1 Initialize the sequencer
          2. 2.4.2.1.2 Enter the "_step" Array Values
          3. 2.4.2.1.3 Analyze the Sequence
        2. 2.4.2.2 Starting the Sequencer and Processing Data
          1. 2.4.2.2.1 Update OWCS Step Values and Calculate "total_conversions"
          2. 2.4.2.2.2 Starting the Sequencer and Taking Data
          3. 2.4.2.2.3 Processing the OWCS Data
          4. 2.4.2.2.4 Using the OWCS Results
  6. 3Summary
  7. 4References
  8. 5Appendix A
    1. 5.1 Using OWCS with Redundant Systems
      1. 5.1.1 Dual, Redundant Systems versus Single-Device Systems
      2. 5.1.2 Using 1x OWCS versus 2x OWCS in a Dual Redundant System
      3. 5.1.3 Error Sources in Dual, Redundant Systems
        1. 5.1.3.1 RA1 and RB1 Errors
        2. 5.1.3.2 RA2 and RB2 Errors
        3. 5.1.3.3 VREF1 and VREF2 Errors
      4. 5.1.4 Measuring Differential Inputs in a Dual, Redundant System
      5. 5.1.5 Dual, Redundant System Summary

2.2.2.3 How Input Capacitance Affects OWCS Performance for Single-Ended Inputs

Section 2.2.2 describes the OWCS performance using the standard ADS125H18 EVM with no passive components installed between the terminal block and the ADC input pins. However, many industrial systems include capacitors on the inputs for noise rejection or other purposes. Figure 2-10 shows an example of a system with a differential capacitor in red installed between the AIN8 and AIN9 analog inputs as well as common-mode (single-ended) capacitors in blue installed between each input and ground. The ADS125H18 EVM includes footprints for these components that are not populated by default.

Measuring a Single-Ended Input on the ADS125H18EVM with Input CapacitanceFigure 2-10 Measuring a Single-Ended Input on the ADS125H18EVM with Input Capacitance

Adding capacitance on the analog inputs can help reduce noise at the expense of increased settling time due to capacitor charging. This behavior affects the measurement when the current sources (OWCS) switch on because the capacitor cannot charge up to the required voltage instantaneously. This effect is also measurable when the OWCS turn off because the capacitor cannot discharge instantaneously.

Multiple capacitors were installed on the ADS125H18 EVM to measure how input capacitance affects the OWCS detection behavior. Otherwise, the same settings were used as listed at the beginning of Section 2.2.2. The input was then measured by taking 512 conversions with the OWCS disabled followed by 512 conversions with the OWCS enabled. Next, the OWCSDelta_SE value was calculated using Equation 1 and converted to a predicted RSOURCE_OWCS value by rearranging the terms in Equation 7. Table 2-7 shows the measured, averaged results when RSOURCE = 800kΩ across 3 different ODRs and 4 different input capacitance values:

Table 2-7 Measured OWCSDelta and Predicted RSOURCE_OWCS for Different ODRs and Input Capacitance (Single-Ended Input, RSOURCE = 800kΩ)
Input capacitance (nF)ODR = 1.6kSPSODR = 12.5kSPSODR = 50kSPS
OWCSDelta_SERSOURCE_OWCS (kΩ)OWCSDelta_SERSOURCE_OWCS (kΩ)OWCSDelta_SERSOURCE_OWCS (kΩ)
123.46%781.1523.45%769.4023.41%716.45
1023.42%731.6423.33%616.8523.19%480.98
10023.32%614.0323.11%406.9122.84%196.04
100023.06%359.7122.65%80.5422.53%13.18

Table 2-7 reveals that the OWCSDelta_SE values vary greatly across data rate and input capacitance. For example, the predicted RSOURCE_OWCS value when ODR = 1.6kSPS and input capacitance = 1nF is 781.15kΩ. This result is approximately equal to the ideal 800kΩ RSOURCE value. However, the predicted RSOURCE_OWCS value when ODR = 50kSPS and input capacitance = 1000nF is only 13.18kΩ! Reviewing the data point-by-point helps illuminate why such a large discrepancy exists across the different parameters.

Figure 2-11 plots the OWCSDelta_SE values point-by-point for RSOURCE = 800kΩ and ODR = 12.5kSPS for 4 different input capacitance values: 1nF, 10nF, 100nF, and 1000nF.

OWCSDelta Behavior Across Different Input Capacitance Values (Single-Ended Input, RSOURCE = 800kΩ, ODR = 12.5kSPS)Figure 2-11 OWCSDelta Behavior Across Different Input Capacitance Values (Single-Ended Input, RSOURCE = 800kΩ, ODR = 12.5kSPS)

Figure 2-11 reveals the significant effect input capacitance has on the OWCS behavior as well as why there is such extreme variation in the results listed in Table 2-7:

  • The 1-nF plot reaches the expected OWCSDelta_SE value of 23.48% after approximately 75 conversions
  • The other three (3) plots never reach the expected OWCSDelta_SE value
  • The other three (3) plots never reach a settled state even after 512 conversions

These conclusions make sense because the capacitor time constant increases as the input capacitance increases, resulting in longer settling times.

Changing the ODR with input capacitors installed also affects the OWCS performance as mentioned previously. Figure 2-12 plots the OWCSDelta_SE values for RSOURCE = 800kΩ and input capacitance = 10nF point-by-point for 3 different ODRs: 1.6kSPS, 12.5kSPS, and 50kSPS. The plot x-axis units are in milliseconds to clearly indicate the charging behavior captured by the ADC. Also, all plots start at the same point and overlay each other.

OWCSDelta Behavior Across Different ODR Values (Single-Ended Input, RSOURCE = 800kΩ, Input Capacitance = 10nF)Figure 2-12 OWCSDelta Behavior Across Different ODR Values (Single-Ended Input, RSOURCE = 800kΩ, Input Capacitance = 10nF)

The results in Figure 2-12 make sense because the ADC sampling time decreases as ODR increases, even though the capacitor time constant remains unchanged. Therefore, the ADC captures more of the capacitor charging behavior and less of the steady-state behavior as the data rate increases, leading to less stable measurements.

The input capacitance does help reduce noise as stated previously. Figure 2-13 plots the measured ADC code point-by-point with OWCS disabled for RSOURCE = 800kΩ and ODR = 12.5kSPS for 4 different values of input capacitance: 1nF, 10nF, 100nF, and 1000nF.

ADC Code Behavior Across Different Input Capacitance Values (Single-Ended Input, OWCS disabled, RSOURCE = 800kΩ, ODR = 12.5kSPS)Figure 2-13 ADC Code Behavior Across Different Input Capacitance Values (Single-Ended Input, OWCS disabled, RSOURCE = 800kΩ, ODR = 12.5kSPS)

Figure 2-13 qualitatively shows that the noise spread decreases as the input capacitance increases. Specifically, the RMS noise when input capacitance = 1nF is 160.38 codes, while the RMS noise when the input capacitance = 1000nF is only 14.09 codes. Designers must take care to balance the noise reduction benefits of an input capacitor with the challenges introduced by capacitor settling.