SLAAE48 May   2025 TAS5825M

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Smart Amp Fundamentals
    1. 2.1 Speaker Basics and Models
    2. 2.2 Smart Amp Algorithm
  6. 3Preparation Work
    1. 3.1 Hardware Preparation
    2. 3.2 Software Preparation
    3. 3.3 Speaker Information
  7. 4Speaker Characterization
    1. 4.1 Characterization Set-up
    2. 4.2 Characterization Process
    3. 4.3 Speaker Characterization Guide
      1. 4.3.1 Hardware Connection
      2. 4.3.2 Power Up
      3. 4.3.3 Software Configuration
      4. 4.3.4 Speaker Characterization
        1. 4.3.4.1 Preparation
        2. 4.3.4.2 Speaker Type Selection
        3. 4.3.4.3 IV Measurement
        4. 4.3.4.4 Determine BL
        5. 4.3.4.5 Thermal Measurement
        6. 4.3.4.6 SPL Measurement
        7. 4.3.4.7 Safe Operating Area
        8. 4.3.4.8 Speaker Model Export
  8. 5Smart Amp Tuning and Verification
    1. 5.1 Smart Amp Tuning Guide
      1. 5.1.1  System Check
      2. 5.1.2  Choose Processing Flow
      3. 5.1.3  Import Speaker Model
      4. 5.1.4  Analog Gain Setting
      5. 5.1.5  Adjust System Gain
      6. 5.1.6  Equalizer Setting
      7. 5.1.7  Smart Bass Tuning
      8. 5.1.8  Bass Compensation
        1. 5.1.8.1 Corner Frequency
        2. 5.1.8.2 Alignment Order and Type
      9. 5.1.9  Max Level Tuning
        1. 5.1.9.1 Xmax
        2. 5.1.9.2 LAE Frequency
        3. 5.1.9.3 Power Limit
        4. 5.1.9.4 Attack, Decay, Energy
      10. 5.1.10 Anti Clipper
    2. 5.2 Smart Amp Verification
      1. 5.2.1 SPL Response Verification
      2. 5.2.2 Thermal Protection Verification
  9. 6Summary
  10. 7References

5.1.4 Analog Gain Setting

Analog gain of TAS5825M needs to be revised according to actual PVDD supply voltage, which can avoid analog PVDD clipping. For more information, please refer to the application note, General Tuning Guide for TAS58xx Family. Please use the following formulas to calculate designed for analog gain:

Equation 17. A n a log _ g a i n ≈ 20 × log 10 V s p e a k e r _ m a x 29 . 5 V d B
Equation 18. V s p e a k e r _ m a x ≈ P V D D × R s p e a k e r R s p e a k e r + 2 × R d s _ o n + Z D C
TAS5825M Characterization View Figure 5-5 Characterization View

For example, if using 12V PVDD as power supply of TAS5825M:

Equation 19. V s p e a k e r _ m a x ≈ 12 V × 4 4 + 2 × 0 . 18 + 0 . 023 = 10 . 89 V
Equation 20. A n a log _ g a i n ≈ 20 × log 10 10 . 89 V 29 . 5 V d B ≈ - 8 . 7 d B

For TAS5825M, the analog gain step is 0.5dB. So in this example, the analog gain needs to be set to -9 dB to avoid PVDD clipping, shown Figure 5-6.

TAS5825M Analog Gain Setting Figure 5-6 Analog Gain Setting