SLAAER9 May 2025 TAC5212
This section describes an example implementation of the auxiliary ASI mixer on the recording path. The following sample code was executed on a TAC5112EVM-K evaluation module using PurePathâ„¢ Console 3. The test involves giving 4 digital inputs to the mixer:
The device outputs the 4 mixed signals as follows:
Since PASI bus was running at 48kHz and SASI bus at 16kHz, the SRC is enabled, and the PASI is considered the main ASI bus, while the SASI is considered the auxiliary ASI bus.
The results are shown in Figure 3-5.
w a0 00 00 #Page 0
w a0 01 01 #SW Reset
d 01
w a0 00 00 #Page 0
w a0 02 09 #Exit Sleep Mode with DREG and VREF Enabled
d 10
w a0 1a 30 #PASI in TDM protocol with 32-bit word length
w a0 64 20 #DAC Channel 1 configured for differential output with 0.6*Vref as common mode
w a0 65 20 #DAC OUT1P configured for line out driver and audio bandwidth
w a0 66 20 #DAC OUT1M configured for line out driver and audio bandwidth
w a0 6b 20 #DAC Channel 2 configured for differential output with 0.6*Vref as common mode
w a0 6c 20 #DAC OUT2P configured for line out driver and audio bandwidth
w a0 6d 20 #DAC OUT2M configured for line out driver and audio bandwidth
w a0 0a 10 #Configure GPIO1 as GPI
w a0 0b 10 #Configure GPIO2 as GPI
w a0 0c 71 #Configure GPIO3 as SASI DOUT
w a0 0d 02 #Configure GPI1 as GPI
w a0 11 94 #Configure GPIO1 as SASI FSYNC, GPIO2 as SASI BCLK
w a0 12 60 #Select GPI1 as SASI DIN
w a0 18 00 #Enable SASI
w a0 22 24 #PASI TX CH5 to DAC Loopback CH1
w a0 23 25 #PASI TX CH6 to DAC Loopback CH2
w a0 26 01 #RX Offset = 1
w a0 28 20 #PASI RX CH1 to DAC CH1
w a0 29 21 #PASI RX CH2 to DAC CH2
w a0 00 03 #Page 3
w a0 28 20 #SASI RX CH1 to DAC CH1
w a0 29 21 #SASI RX CH2 to DAC CH2
w a0 00 01 #Page 1
w a0 17 80 #Enable SRC
w a0 2c 80 #Enable DAC ASI Mixer
#DAC AUX Mixer Inputs
#IN1 = Main ASI IN1 - 1.5kHz, 0.4FS signal tone (0.4FS)
#IN2 = Main ASI IN2 - 3.3kHz, 0.4FS signal tone (0.4FS)
#IN3 = Aux ASI IN1 - 100Hz, 0.5FS signal tone (0.4FS)
#IN4 = Aux ASI IN2 - 900Hz, 0.6FS signal tone (0.4FS)
#DAC Signal Chain OUT1 = 0.5*IN1 + 0.25*IN2 + 0.2*IN3 + 0.33*IN4
#DAC Signal Chain OUT2 = 0.2*IN1 + 0.5*IN2 + 0.4*IN3 + 0.5*IN4
#DAC Signal Chain OUT3 = 0.8*IN2 + 1.1*IN3
#DAC Signal Chain OUT4 = 1.25*IN1 + 0.5*IN4
w a0 00 11 #Page 17
#Main ASI Mixer Coefficients
w a0 08 0c cd 20 00 #a1 = 0.5, a2 = 0.2
w a0 0c 50 00 00 00 #a3 = 0, a4 = 1.25
w a0 10 20 00 10 00 #b1 = 0.25, b2 = 0.5
w a0 14 00 00 33 33 #b3 = 0.8, b4 = 0
w a0 18 00 00 00 00 #c1 = 0, c2 = 0
w a0 1c 00 00 00 00 #c3 = 0, c4 = 0
w a0 20 00 00 00 00 #d1 = 0, d2 = 0
w a0 24 00 00 00 00 #d3 = 0, d4 = 0
#Aux ASI Mixer Coefficients
w a0 48 19 9a 0c cd #a1 = 0.2, a2 = 0.4
w a0 4c 00 00 46 66 #a3 = 1.1, a4 = 0
w a0 50 20 00 15 1f #b1 = 0.33, b2 = 0.5
w a0 54 20 00 00 00 #b3 = 0, b4 = 0.5
w a0 00 00 #Page 0
w a0 76 0f #DAC Channels 1-4 enabled
w a0 78 40 #DAC Powered Up