SLAAER9 May   2025 TAC5212

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Recording Path Mixers
    1. 2.1 Main ASI Mixer
      1. 2.1.1 Q-31 Formatting for Mixer Coefficients
      2. 2.1.2 Recording Path Main ASI Mixer: Example
    2. 2.2 Auxiliary ASI Mixer
      1. 2.2.1 Recording Path Auxiliary ASI Mixer - Example
    3. 2.3 ADC-to-DAC Loopback Mixer
    4. 2.4 TDM Transmission on DOUT
  6. 3Playback Path Mixers
    1. 3.1 Main ASI Mixer
      1. 3.1.1 Q-16 Formatting for Mixer Coefficients
      2. 3.1.2 Playback Path Main ASI Mixer - Example
    2. 3.2 Auxiliary ASI Mixer
      1. 3.2.1 Playback Path Auxiliary ASI Mixer - Example
    3. 3.3 Playback Path Side-Chain Mixer
      1. 3.3.1 Playback Path Side-Chain - Example
  7. 4Application: ADC Channel Summation to Improve TAC5212 Dynamic Range
  8. 5Application: Analog Input to Analog Output Signal Flow in TAC5412-Q1
  9. 6Summary
  10. 7References

3.2 Auxiliary ASI Mixer

The block diagram for the auxiliary ASI mixer is shown in Figure 3-4.

Playback Auxiliary ASI Mixer Figure 3-4 Playback Auxiliary ASI Mixer

As indicated in the block diagram, the auxiliary mixer takes 2 digital inputs from the DIN of the auxiliary ASI bus and mixes them per Equation 5.

Equation 5. A U X   C H x   O U T P U T   =   a x   ×   A U X   A S I   I N 1   +   b x   ×   A U X   A S I   I N 2

This signal is then added to the output of the main ASI mixer and then sent to the digital HPF block of the playback signal chain as shown in Figure 3-1. The Sample Rate Converter (SRC) can either be enabled op bypassed based on the sampling rate of the main and auxiliary ASI buses.

The coefficients [ax, bx] can be programmed as 16-bit signed values into the Page 17 registers which are described in Table 3-2. These coefficients are written in the 2.14 format described in Section 3.1.1.

Table 3-2 Page 17 Registers for Auxiliary ASI Mixer
Register Address Register Register Description Reset Value Coefficient
0x48 ASI_DIN_MIX_ASI_AUX_CH1_RDAC_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH1 to RDAC coefficient byte[15:8] 0x00 a2
0x49 ASI_DIN_MIX_ASI_AUX_CH1_RDAC_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH1 to RDAC coefficient byte[7:0] 0x00
0x4A ASI_DIN_MIX_ASI_AUX_CH1_LDAC_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH1 to LDAC coefficient byte[15:8] 0x40 a1
0x4B ASI_DIN_MIX_ASI_AUX_CH1_LDAC_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH1 to LDAC coefficient byte[7:0] 0x00
0x4C ASI_DIN_MIX_ASI_AUX_CH1_RDAC2_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH1 to RDAC2 coefficient byte[15:8] 0x00 a4
0x4D ASI_DIN_MIX_ASI_AUX_CH1_RDAC2_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH1 to RDAC2 coefficient byte[7:0] 0x00
0x4E ASI_DIN_MIX_ASI_AUX_CH1_LDAC2_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH1 to LDAC2 coefficient byte[15:8] 0x40 a3
0x4F ASI_DIN_MIX_ASI_AUX_CH1_LDAC2_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH1 to LDAC2 coefficient byte[7:0] 0x00
0x50 ASI_DIN_MIX_ASI_AUX_CH2_RDAC_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH2 to RDAC coefficient byte[15:8] 0x40 b2
0x51 ASI_DIN_MIX_ASI_AUX_CH2_RDAC_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH2 to RDAC coefficient byte[7:0] 0x00
0x52 ASI_DIN_MIX_ASI_AUX_CH2_LDAC_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH2 to LDAC coefficient byte[15:8] 0x00 b1
0x53 ASI_DIN_MIX_ASI_AUX_CH2_LDAC_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH2 to LDAC coefficient byte[7:0] 0x00
0x54 ASI_DIN_MIX_ASI_AUX_CH2_RDAC2_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH2 to RDAC2 coefficient byte[15:8] 0x40 b4
0x55 ASI_DIN_MIX_ASI_AUX_CH2_RDAC2_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH2 to RDAC2 coefficient byte[7:0] 0x00
0x56 ASI_DIN_MIX_ASI_AUX_CH2_LDAC2_MIX_BYT1[7:0] ASI DIN MIXER, ASI AUX_CH2 to LDAC2 coefficient byte[15:8] 0x00 b3
0x57 ASI_DIN_MIX_ASI_AUX_CH2_LDAC2_MIX_BYT2[7:0] ASI DIN MIXER, ASI AUX_CH2 to LDAC2 coefficient byte[7:0] 0x00