SLAAER9 May   2025 TAC5212

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Recording Path Mixers
    1. 2.1 Main ASI Mixer
      1. 2.1.1 Q-31 Formatting for Mixer Coefficients
      2. 2.1.2 Recording Path Main ASI Mixer: Example
    2. 2.2 Auxiliary ASI Mixer
      1. 2.2.1 Recording Path Auxiliary ASI Mixer - Example
    3. 2.3 ADC-to-DAC Loopback Mixer
    4. 2.4 TDM Transmission on DOUT
  6. 3Playback Path Mixers
    1. 3.1 Main ASI Mixer
      1. 3.1.1 Q-16 Formatting for Mixer Coefficients
      2. 3.1.2 Playback Path Main ASI Mixer - Example
    2. 3.2 Auxiliary ASI Mixer
      1. 3.2.1 Playback Path Auxiliary ASI Mixer - Example
    3. 3.3 Playback Path Side-Chain Mixer
      1. 3.3.1 Playback Path Side-Chain - Example
  7. 4Application: ADC Channel Summation to Improve TAC5212 Dynamic Range
  8. 5Application: Analog Input to Analog Output Signal Flow in TAC5412-Q1
  9. 6Summary
  10. 7References

Auxiliary ASI Mixer

The auxiliary mixer can be used when transmitting data to the auxiliary ASI's data output.

This can optionally be done through a Sample Rate Converter (SRC) when the auxiliary ASI is sampling data at a rate which is an integral sub-multiple of the sampling rate of the main ASI.

As shown in Figure 2-4, the auxiliary ASI mixer mixes the two signals from the ADC-to-DAC loopback mixer (A2D_LBx) with the output of the digital volume (DVOL) block of the CH3 and CH4 playback signal chains.

 Recording Path Auxiliary ASI
                    Mixer Figure 2-4 Recording Path Auxiliary ASI Mixer

The mixer then outputs this signal to the DOUT of the Auxiliary ASI bus either directly or through a Sample Rate Converter (SRC).

The auxiliary ASI mixer mixes the signals according to Equation 2

Equation 2. A U X A S I D O U T C H 1   =   x 1 × ( M A I N A S I R X C H 3 )   + ( 1   -   x 1 ) × ( A 2 D L O O P B A C K C H 1 ) A U X A S I S D O U T C H 2   =   x 2 × ( M A I N A S I R X C H 4 )   + ( 1   -   x 2 ) × ( A 2 D L O O P B A C K C H 2 )

The coefficients x1 and x2 are programmed as 32-bit signed values into the Page 11 registers which are described in Table 2-2. These coefficients are written in the 2.30 format described in Section 2.1.1.

Table 2-2 Page 11 Registers for Auxiliary ASI Mixer
Register Address Register Register Description Reset Value Coefficient
0x30 ADC_AUX_MIX_CH1_BYT1[7:0] ADC Auxiliary Mixer CH1 coefficient byte[31:24] 0x00 x1
0x31 ADC_AUX_MIX_CH1_BYT2[7:0] ADC Auxiliary Mixer CH1 coefficient byte[23:16] 0x00
0x32 ADC_AUX_MIX_CH1_BYT3[7:0] ADC Auxiliary Mixer CH1 coefficient byte[15:8] 0x00
0x33 ADC_AUX_MIX_CH1_BYT4[7:0] ADC Auxiliary Mixer CH1 coefficient byte[7:0] 0x00
0x34 ADC_AUX_MIX_CH2_BYT1[7:0] ADC Auxiliary Mixer CH2 coefficient byte[31:24] 0x00 x2
0x35 ADC_AUX_MIX_CH2_BYT2[7:0] ADC Auxiliary Mixer CH2 coefficient byte[23:16] 0x00
0x36 ADC_AUX_MIX_CH2_BYT3[7:0] ADC Auxiliary Mixer CH2 coefficient byte[15:8] 0x00
0x37 ADC_AUX_MIX_CH2_BYT4[7:0] ADC Auxiliary Mixer CH2 coefficient byte[7:0] 0x00