SLAAEU2 August   2025 MSPM0C1104

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 System Introduction
    2. 1.2 MSPM0C110x Introduction
    3. 1.3 MCF8315D Introduction
  5. 2Hardware Setup
    1. 2.1 LP-MSPM0C1104 Hardware Setup
    2. 2.2 MCF8315PWPEVM Hardware Setup
  6. 3Software Structure
    1. 3.1 Software Function and Flow Diagram
    2. 3.2 Project File Structure
    3. 3.3 Configure and Control MCF8315
      1. 3.3.1 MCF8315D I2C Protocol Description
      2. 3.3.2 CRC Verification and Parity Check
      3. 3.3.3 MCF EEPROM or RAM Program
  7. 4System Test
    1. 4.1 Test Setup
    2. 4.2 System Value Monitor
  8. 5Summary
  9. 6References

3.3.1 MCF8315D I2C Protocol Description

MSPM0C1104 communicate with MCF8315D over an I2C serial interface. MSPM0C1104 works as I2C controller, MCF8315D works as I2C target. The I2C communication follows the I2C data word format shown in Table 3-2.

Table 3-2 I2C Data Word Format
TARGET_ID R/W CONTROL WORD DATA CRC-8
A6 - A0 W0 CW23 - CW0 D15, D31, D63 - D0 C7 - C0

Target ID and R/W Bit: The first byte includes the 7-bit I2C target ID, followed by the read or write command bit. Every packet in MCF8315D the communication protocol starts with writing a 24-bit control word, hence, the R/W bit is always 0.

24-bit Control Word: The control word format is shown in Table 3-2 and the detailed descriptions can be found in the MCF8315D Sensorless Field Oriented Control (FOC) Integrated FET BLDC Driver data sheet. In the demo code, CRC_EN is set to 1 to enable the CRC verification, DLEN set to 01b to use 32-bit data length, and MEM_SEC and MEM_PAGE are set to 0 since all other memory sectors and pages are not for external use.

Table 3-3 24-bit Control Word Format
OP_R/W CRC_EN DLEN MEM_SEC MEM_PAGE MEM_ADDR
CW23 CW22 CW21- CW20 CW19 - CW16 CW15 - CW12 CW11 - CW0

Data Bytes: the data needs to be input in corresponding MEM_ADDR and the DLEN field in the control word corresponds with the number of bytes sent in this section. In case of mismatch between number of data bytes and DLEN, the write operation is discarded.

CRC Byte: If the CRC feature is enabled in the control word, CRC byte has to be sent at the end of a write transaction. The details of CRC Byte calculation is described in 3.3.2 CRC verification and parity verification

Figure 3-2 and Figure 3-3 show the I2C read or write sequence according to MCF8315D I2C protocol. To communicate with MCF8315D properly, MCU needs to support I2C clock stretch. For more information, refer to the MSPM0C110x, MSPS003 Mixed-Signal Microcontrollers data sheet and the MCF8315D Sensorless Field Oriented Control (FOC) Integrated FET BLDC Driver data sheet.

MCF8315D I2C Write Transaction Sequence Figure 3-2 MCF8315D I2C Write Transaction Sequence
MCF8315D I2C Read Transaction Sequence Figure 3-3 MCF8315D I2C Read Transaction Sequence