SLAAEU2 August   2025 MSPM0C1104

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 System Introduction
    2. 1.2 MSPM0C110x Introduction
    3. 1.3 MCF8315D Introduction
  5. 2Hardware Setup
    1. 2.1 LP-MSPM0C1104 Hardware Setup
    2. 2.2 MCF8315PWPEVM Hardware Setup
  6. 3Software Structure
    1. 3.1 Software Function and Flow Diagram
    2. 3.2 Project File Structure
    3. 3.3 Configure and Control MCF8315
      1. 3.3.1 MCF8315D I2C Protocol Description
      2. 3.3.2 CRC Verification and Parity Check
      3. 3.3.3 MCF EEPROM or RAM Program
  7. 4System Test
    1. 4.1 Test Setup
    2. 4.2 System Value Monitor
  8. 5Summary
  9. 6References

1.3 MCF8315D Introduction

The MCF8315D provides a single-chip, code-free sensorless FOC device for customers driving speed control on 12V to 24V brushless-DC motors (BLDC) or Permanent Magnet Synchronous motor (PMSM) up to 4A peak current. The MCF8315D integrates three half bridges with 40V absolute maximum capability and a very low RDS(ON). The integrated power management circuits including a voltage-adjustable buck regulator (3.3V, 5V,170mA) and LDO (3.3V, 20mA) can be used to power external circuits. A large number of protection features are integrated into the MCF8315D, such as protection of the device, motor, and system against fault events. Refer to the MCF8315D Sensorless Field Oriented Control (FOC) Integrated FET BLDC Driver for more information.

MCF8315D (PWP) Functional Block Diagram Figure 1-3 MCF8315D (PWP) Functional Block Diagram