SLASFB7A November   2024  – August 2025 TAS5802

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
      1. 5.7.1 Bridge Tied Load (BTL) Configuration Curves with 1SPW Modulation
      2. 5.7.2 Bridge Tied Load (BTL) Configuration Curves with BD Modulation
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Supplies
      2. 6.3.2 Device Clocking
      3. 6.3.3 Serial Audio Port – Clock Rates
      4. 6.3.4 Serial Audio Port (SAP)
      5. 6.3.5 Digital Audio Processing
      6. 6.3.6 Class D Audio Amplifier
        1. 6.3.6.1 Speaker Amplifier Gain Select
    4. 6.4 Device Functional Modes
      1. 6.4.1 Software Control
      2. 6.4.2 Speaker Amplifier Operating Modes
        1. 6.4.2.1 BTL Mode
      3. 6.4.3 Low EMI Modes
        1. 6.4.3.1 Spread Spectrum
        2. 6.4.3.2 Channel to Channel Phase Shift
        3. 6.4.3.3 Multi-Devices PWM Phase Synchronization
      4. 6.4.4 Thermal Foldback
      5. 6.4.5 Device State Control
      6. 6.4.6 Device Modulation
        1. 6.4.6.1 BD Modulation
        2. 6.4.6.2 1SPW Modulation
        3. 6.4.6.3 Hybrid Modulation
    5. 6.5 Programming and Control
      1. 6.5.1 I2C Serial Communication Bus
      2. 6.5.2 Target Address
        1. 6.5.2.1 Random Write
        2. 6.5.2.2 Sequential Write
        3. 6.5.2.3 Random Read
        4. 6.5.2.4 Sequential Read
        5. 6.5.2.5 DSP Memory Book, Page and BQ update
        6. 6.5.2.6 Checksum
          1. 6.5.2.6.1 Cyclic Redundancy Check (CRC) Checksum
          2. 6.5.2.6.2 Exclusive or (XOR) Checksum
      3. 6.5.3 Control via Software
        1. 6.5.3.1 Startup Procedures
        2. 6.5.3.2 Shutdown Procedures
        3. 6.5.3.3 Protection and Monitoring
          1. 6.5.3.3.1 Overcurrent Shutdown (OCSD)
          2. 6.5.3.3.2 DC Detect
          3. 6.5.3.3.3 Device Over Temperature Protection
          4. 6.5.3.3.4 Over Voltage Protection
          5. 6.5.3.3.5 Under Voltage Protection
          6. 6.5.3.3.6 Clock Fault
  9. 7 Register Maps
    1. 7.1 CONTROL PORT Registers
  10. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bootstrap Capacitors
      2. 8.1.2 Inductor Selections
      3. 8.1.3 Power Supply Decoupling
      4. 8.1.4 Output EMI Filtering
    2. 8.2 Typical Applications
      1. 8.2.1 2.0 (Stereo BTL) System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedures
          1. 8.2.1.2.1 Step 1: Hardware Integration
          2. 8.2.1.2.2 Step 2: Speaker Tuning
          3. 8.2.1.2.3 Step 3: Software Integration
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 DVDD Supply
      2. 8.3.2 PVDD Supply
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 General Guidelines for Audio Amplifiers
        2. 8.4.1.2 Importance of PVDD Bypass Capacitor Placement on PVDD Network
        3. 8.4.1.3 Optimizing Thermal Performance
          1. 8.4.1.3.1 Device, Copper, and Component Layout
          2. 8.4.1.3.2 Stencil Pattern
            1. 8.4.1.3.2.1 PCB footprint and Via Arrangement
            2. 8.4.1.3.2.2 Solder Stencil
      2. 8.4.2 Layout Example
  11. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information
    1.     PACKAGE OPTION ADDENDUM
    2. 11.1 Tape and Reel Information
    3. 11.2 Mechanical Data

4 Pin Configuration and Functions

TAS5802 PWP (TSSOP) Package, 28-Pin PadDown, Top View Figure 4-1 PWP (TSSOP) Package, 28-Pin PadDown, Top View
Table 4-1 Pin Functions For TSSOP28 Package
PIN TYPE(1) DESCRIPTION
NO. NAME
1 DGND P Digital ground
2 DVDD P 3.3-V/1.8-V digital power supply
3 ADR/FAULT DI/O A table of resistor value (Pull up/Down to DVDD/GND) will decide device I2C address.

After power up, this pin can be programmed by writing 1 to a register bit after Power up bit. In this mode, ADR/ FAULT is redefine as FAULT.
4 VR_DIG P Internally regulated 1.5-V digital supply voltage. This pin must not be used to drive external devices
5 DGND P Digital ground
6 LRCLK DI Input serial audio data left/right clock (sample rate clock)
7 SCLK DI Serial audio data clock (shift clock). SCLK is the serial audio port input data bit clock.
8 SDIN DI Serial audio data input. SDIN supports three discrete (stereo) data formats
9 SDOUT DO Serail audio data output, the source data can select as Pre-DSP or Post-DSP.
10 SDA DI/O I2C serial control data interface input/output
11 SCL DI I2C serial control clock input
12 PDN DI Power down, active-low. PDN sets the amplifier in Shutdown, turn off all internal regulators.
13 AVDD P Internally regulated 5 V analog power voltage. This pin must not be used to drive external devices.
14 AGND G Analog ground
15 PVDD P PVDD voltage input
16 PVDD P PVDD voltage input
17 OUT_B+ PO Positive pin for differential speaker amplifier output B+
18 BST_B+ P Connection point for the OUT_B+ bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_B+
19 PGND G Ground reference for power device circuitry. Connect this pin to system ground
20 OUT_B- NO Negative pin for differential speaker amplifier output B-
21 BST_B- P Connection point for the OUT_B- bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_B-
22 BST_A- P Connection point for the OUT_A- bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_A-
23 OUT_A- NO Negative pin for differential speaker amplifier output A-
24 PGND G Ground reference for power device circuitry. Connect this pin to system ground
25 BST_A+ P Connection point for the OUT_A+ bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_A+
26 OUT_A+ PO Positive pin for differential speaker amplifier output A+
27 PVDD P PVDD voltage input
28 PVDD P PVDD voltage input
PowerPADTM G Ground, connect to grounded heat sink for best system performance.
(1) AI = Analog input, AO = Analog output, DI = Digital Input, DO = Digital Output, DI/O = Digital Bi-directional (input and output), PO = Positive output, NO = Negative output, P = Power, G = Ground (0 V)