SLASFB7A November   2024  – August 2025 TAS5802

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
      1. 5.7.1 Bridge Tied Load (BTL) Configuration Curves with 1SPW Modulation
      2. 5.7.2 Bridge Tied Load (BTL) Configuration Curves with BD Modulation
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Supplies
      2. 6.3.2 Device Clocking
      3. 6.3.3 Serial Audio Port – Clock Rates
      4. 6.3.4 Serial Audio Port (SAP)
      5. 6.3.5 Digital Audio Processing
      6. 6.3.6 Class D Audio Amplifier
        1. 6.3.6.1 Speaker Amplifier Gain Select
    4. 6.4 Device Functional Modes
      1. 6.4.1 Software Control
      2. 6.4.2 Speaker Amplifier Operating Modes
        1. 6.4.2.1 BTL Mode
      3. 6.4.3 Low EMI Modes
        1. 6.4.3.1 Spread Spectrum
        2. 6.4.3.2 Channel to Channel Phase Shift
        3. 6.4.3.3 Multi-Devices PWM Phase Synchronization
      4. 6.4.4 Thermal Foldback
      5. 6.4.5 Device State Control
      6. 6.4.6 Device Modulation
        1. 6.4.6.1 BD Modulation
        2. 6.4.6.2 1SPW Modulation
        3. 6.4.6.3 Hybrid Modulation
    5. 6.5 Programming and Control
      1. 6.5.1 I2C Serial Communication Bus
      2. 6.5.2 Target Address
        1. 6.5.2.1 Random Write
        2. 6.5.2.2 Sequential Write
        3. 6.5.2.3 Random Read
        4. 6.5.2.4 Sequential Read
        5. 6.5.2.5 DSP Memory Book, Page and BQ update
        6. 6.5.2.6 Checksum
          1. 6.5.2.6.1 Cyclic Redundancy Check (CRC) Checksum
          2. 6.5.2.6.2 Exclusive or (XOR) Checksum
      3. 6.5.3 Control via Software
        1. 6.5.3.1 Startup Procedures
        2. 6.5.3.2 Shutdown Procedures
        3. 6.5.3.3 Protection and Monitoring
          1. 6.5.3.3.1 Overcurrent Shutdown (OCSD)
          2. 6.5.3.3.2 DC Detect
          3. 6.5.3.3.3 Device Over Temperature Protection
          4. 6.5.3.3.4 Over Voltage Protection
          5. 6.5.3.3.5 Under Voltage Protection
          6. 6.5.3.3.6 Clock Fault
  9. 7 Register Maps
    1. 7.1 CONTROL PORT Registers
  10. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Bootstrap Capacitors
      2. 8.1.2 Inductor Selections
      3. 8.1.3 Power Supply Decoupling
      4. 8.1.4 Output EMI Filtering
    2. 8.2 Typical Applications
      1. 8.2.1 2.0 (Stereo BTL) System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedures
          1. 8.2.1.2.1 Step 1: Hardware Integration
          2. 8.2.1.2.2 Step 2: Speaker Tuning
          3. 8.2.1.2.3 Step 3: Software Integration
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 DVDD Supply
      2. 8.3.2 PVDD Supply
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 General Guidelines for Audio Amplifiers
        2. 8.4.1.2 Importance of PVDD Bypass Capacitor Placement on PVDD Network
        3. 8.4.1.3 Optimizing Thermal Performance
          1. 8.4.1.3.1 Device, Copper, and Component Layout
          2. 8.4.1.3.2 Stencil Pattern
            1. 8.4.1.3.2.1 PCB footprint and Via Arrangement
            2. 8.4.1.3.2.2 Solder Stencil
      2. 8.4.2 Layout Example
  11. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  12. 10Revision History
  13. 11Mechanical, Packaging, and Orderable Information
    1.     PACKAGE OPTION ADDENDUM
    2. 11.1 Tape and Reel Information
    3. 11.2 Mechanical Data

8.2.1.1 Design Requirements

  • Power supplies:
    • 3.3V or 1.8V supply
    • 4.5V to 20V supply
  • Communication: host processor serving as I2C compliant master
  • External memory (Such as EEPROM and FLASH) used for coefficients

The requirement for the supporting components for the TAS5802 device in a Stereo 2.0 (BTL) system is provide in Table 8-3 and Table 8-4.

Table 8-3 Supporting Component Requirements for Stereo 2.0 (BTL) system (With Ferrite bead as output filter)
REFERENCE DESIGNATORVALUESIZEDETAILED DESCRIPTION
C1,C2,C5,C622uF0805CAP, CERM, 22µF, 35V, +/- 20%, JB, 0805
C3,C40.1uF0402CAP, CERM, 0.1µF, 50V, +/- 10%, X7R, 0402
C74.7uF0603CAP, CERM, 4.7µF, 10V, +/- 10%, X5R, 0603
C80.1uF0603CAP, CERM, 0.1µF, 16V, +/- 10%, X7R, 0603
C9,C101uF0603CAP, CERM, 1µF, 16V, +/- 10%, X5R, 0603
R14.70kΩ0402RES, 4.70kΩ, 1%, 0.0625W, 0402
R210.0kΩ0404RES, 10.0kΩ, 1%, 0.063W, 0402
C11,C12,C13,C140.22uF0603CAP, CERM, 0.22µF, 50V, +/- 10%, X7R, 0603
C15,C16,C17,C18,C19,C20,C21,C22,C232200pF0603CAP, CERM, 2200pF, 100V,+/- 10%, X7R, 0603
R3,R4,R5,R668ohm0603ES, 68Ω, 5%, 0.1W, 0603
L1,L2,L3,L4300ohm0806Ferrite Bead, 300Ω @ 100MHz, 3.1A, 0806
L5100 ohm0806Ferrite Bead, 100 ohm @ 100 MHz, 4 A, 0806

With Low EMI technology, TAS5802 keeps enough EMI margin for most of application cases where PVDD < 14V with ferrite bead (Low BOM cost). With Ferrite Bead and capacitor as the output filter, Figure 8-1 and Figure 8-2 include a good configuration (proper value of ferrite bead, capacitor, resistor) to achieve enough EMI margin for the typical case which PVDD = 12V, Speaker Load = 8Ω/6Ω, each speaker wire with 1m length, Output Power = 1W/4W/8W for each channel.

  • Select Ferrite bead (L1~L5). The trade-off is impedance and rated current. If the rated current meet the system's requirement, larger impedance means larger EMI margin for the EMI, especially for the frequency band 5 MHz~50 MHz. The typical ferrite bead recommend for TAS5802 is NFZ2MSM series (Murata) and UPZ2012E series (Sunlord). 300 ohm at 100 MHz ferrite bead is a typical value which can pass EMI for most of application cases.
  • Select capacitor (C15~C23). The trade-off is capacitor value and idle current. Larger capacitor means larger idle current, increase the capacitor value from 1nF to 2.2nF makes much help for frequency band 5 MHz~100 MHz.
  • Using Ferrite bead as the output filter, recommend designer to use Fsw = 384 kHz with Spread spectrum enable, BD Modulation, refer to Section 6.4.3.1.
  • With Ferrite bead as the output power. In order to pass EMI (AC Conducted Emission) standard, an AC to DC adapter with EMI filter in it is needed. For most of applications (TV/Voice Control Speaker/Wireless speaker/Soundbar) which need a 110V~220V power supply usually has a EMI filter in the AC to DC adapter. Some cases use DC power supply and also need to test the DC Conducted Emission , this applications (Automotive/Industry) need a simple EMI filter on PVDD for TAS5802. Refer to application note: AN-2162 Simple Success With Conducted EMI From DC to DC Converters.
Table 8-4 Supporting Component Requirements for Stereo 2.0 (BTL) system (With Inductor as output filter)
REFERENCE DESIGNATORVALUESIZEDETAILED DESCRIPTION
C1,C6390µF10mmx10mmCAP, AL, 390µF, 35V, ±20%, 0.08 ohm, SMD
C2,C522µF0603CAP, CERM, 22µF, 35V, ±20%, JB, 0805
C3,C40.1µF0402CAP, CERM, 0.1µF, 50V, ±10%, X7R, 0402
C74.7µF0603CAP, CERM, 4.7µF, 10V, ±10%, X5R, 0603
C80.1µF0603CAP, CERM, 0.1µF, 16V, ±10%, X7R, 0603
C9,C101µF0603CAP, CERM, 1µF, 16V, ±10%, X5R, 0603
R115.0kΩ0402RES, 15.0kΩ, 1%, 0.0625 W, 0402
R210.0kΩ0404RES, 10.0kΩ, 1%, 0.063W, 0402
C11,C12,C13,C140.22µF0603CAP, CERM, 0.22µF, 50V, ±10%, X7R, 0603
C15,C16,C17,C180.68µF0805CAP, CERM, 0.68µF, 50V, ±10%, X7R, 0805
L1,L2,L3,L410µHInductor, Shielded, 10µH, 4.4A, 0.023Ω, SMD

With Inductor as the output filter, designers can achieve ultra low idle current (with Hybrid Modulation or 1SPW Modulation) and keep large EMI margin. As the switching frequency of TAS5802 can be adjustable from 384 kHz to 768 kHz. Higher switching frequency means smaller Inductor value needed.

  • With 768kHz switching frequency. Designers can select 10uH + 0.68µF or 4.7µH +0.68µF as the output filter, this will help customer to save the Inductor size with the same rated current during the inductor selection. With 4.7uH + 0.68uF, make sure PVDD ≤ 12V to avoid the large ripple current to trigger the OC threshold (5A).
  • With 384kHZ switching frequency. Designers can select 22µH + 0.68µF or 15µH + 0.68µF or 10µH + 0.68µF as the output filter, this will help customer to save power dissipation for some battery power supply application. With 10µH + 0.68µF, make sure PVDD ≤ 12V to avoid the large ripple current to trigger the OC threshold (5A).