SLDS204 Data sheet

SLDS204D October 2014 – February 2025 PGA300

PRODUCTION DATA

5.13 Electrical Characteristics: T Gain Stage (Chopper Stabilized)

over operating ambient temperature range (unless otherwise noted)

	TEST CONDITIONS	MIN	TYP	MAX	UNIT
Gain steps (2 bits)	T_GAIN[1:0] = 0b00		1.33		V/V
	T_GAIN[1:0] = 0b01		2
	T_GAIN[1:0] = 0b10		5
	T_GAIN[1:0] = 0b11		20
Gain-bandwidth product			350		kHz
Input-referred noise density⁽¹⁾	f = 0.1 Hz to 100 Hz, T Gain = 5 V/V		110		nV/√ Hz
Input offset voltage			95		µV
Input bias current			5		nA
Frequency response	T Gain = 20 V/V, <100 Hz			0.335	%V/V
Common-mode voltage range		Depends on selected gain and current supply⁽²⁾			V
Common-mode rejection ratio	f_CM = 50 Hz		110		dB
Input impedance		1			MΩ

(1) Total input-referred noise including T Gain noise, ADC reference noise, T ADC thermal noise, and T ADC quantization noise.

(2) Common Mode at T Gain Input and Output: There are two constraints:

The single-ended voltage of the positive and negative pins at the T Gain input must be between 5 mV and 1.8 V.
The single-ended voltage of the positive and negative pins at the T Gain output must be between 0.1 V and 2 V.