SLFS047D February   1984  – March 2026 TLC556 , TLC556M

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics: VDD = 2V for TLC556C, VDD = 3V for TLC556I
    6. 5.6  Electrical Characteristics: VDD = 5V
    7. 5.7  Electrical Characteristics: VDD = 15V
    8. 5.8  Switching Characteristics
    9. 5.9  Typical Characteristics: TLC556C and TLC556I
    10. 5.10 Typical Characteristics: TLC556M
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram (Each Timer)
    3. 6.3 Feature Description
      1. 6.3.1 Monostable Operation
      2. 6.3.2 Astable Operation
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Designing for Improved ESD Performance
    2. 7.2 Typical Applications
      1. 7.2.1 Pulse-Width Modulation
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Pulse-Position Modulation
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Curves
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2.1.1 Design Requirements

The clock input must have VOL and VOH levels that are less than and greater than 1/3 VDD, respectively. Clock input VOL time must be less than minimum output high time; therefore, a high (positive) duty cycle clock is recommended. Minimum recommended modulation voltage is 1V. Lower CONT voltage can greatly increase threshold comparator propagation delay and storage time. The application must be tolerant of a nonlinear transfer function; the relationship between modulation input and pulse width is not linear because the capacitor charge is RC-based with an negative exponential curve.