4 General R Pin Glitch Background

When the shorted DE and nRE line transitions from high to low, the transceiver switches from transmitting on the bus to reading the bus. R is pulled up with a resistor to VCC, meaning it has a high idle state. When a high level of bus capacitance is present, the last remaining bit can be outputted on the R pin from when the transceiver was previously transmitting. This is due to the capacitance slowing the rate of discharge on the bus. This can be a particular problem for systems using the UART protocol. If the R pin temporarily drops low, the MCU can read this as false start condition.

Figure 4-1 represents what this glitch can look like graphically. The nRE/DE pin is switched into receiving mode, and the A-B bus differential transitions slowly to a high voltage. Because of capacitance on the A-B bus lines, the RXD voltage reads from when the device was previously transmitting. In this case, the R pin shows a voltage low, outlined as the “RXD Glitch State”. Voltage drops greater than 1V can throw a UART error. For this article, any voltage drop greater than 1V can be considered a glitched state.

When the time to discharge the differential output (A-B) lines is greater than the time to turn on the receiver mode, the RXD pin experiences a voltage change seen in Equation 1. The differential bus is still discharging while the receiver is starting to read the bus. Due to the various bus setups and capacitance, this discharge time can vary widely.