SLLSF22I April   2018  – August 2026 ISO1410 , ISO1412 , ISO1430 , ISO1432 , ISO1450 , ISO1452

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1.     Pin Functions: Full-Duplex Device
    2.     Pin Functions: Half-Duplex Device
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics: Driver
    10. 6.10 Electrical Characteristics: Receiver
    11. 6.11 Supply Current Characteristics: Side 1 (ICC1)
    12. 6.12 Supply Current Characteristics: Side 2 (ICC2)
    13. 6.13 Switching Characteristics: Driver
    14. 6.14 Switching Characteristics: Receiver
    15. 6.15 Insulation Characteristics Curves
    16. 6.16 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 8.3.2 Failsafe Receiver
      3. 8.3.3 Thermal Shutdown
      4. 8.3.4 Glitch-Free Power Up and Power Down
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Data Rate and Bus Length
        2. 9.2.2.2 Stub Length
        3. 9.2.2.3 Bus Loading
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Insulation Lifetime
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 PCB Material
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
        1. 10.1.1.1 Related Links
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

6.11 Supply Current Characteristics: Side 1 (ICC1)

 Bus loaded or unloaded (over recommended operating conditions unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
DRIVER ENABLED, RECEIVER DISABLED
Logic-side supply currentVD = VCC1, VCC1 = 5V ± 10%2.64.4mA
Logic-side supply currentVD = VCC1, VCC1 = 3.3V ± 10%2.64.4mA
Logic-side supply currentISO141x, D = 500kbps square wave with 50% duty cycle, VCC1 = 5V ± 10%3.25.1mA
Logic-side supply currentISO141x, D = 500kbps square wave with 50% duty cycle, VCC1 = 3.3V ± 10%3.25.1mA
Logic-side supply currentISO143x, D = 12Mbps square wave with 50% duty cycle, VCC1 = 5V ± 10%3.25.1mA
Logic-side supply currentISO143x, D = 12Mbps square wave with 50% duty cycle, VCC1 = 3.3V ± 10%3.25.1mA
Logic-side supply currentISO145x, D = 50Mbps square wave with 50% duty cycle, VCC1 = 5V ± 10%3.65.3mA
Logic-side supply currentISO145x, D = 50Mbps square wave with 50% duty cycle, VCC1 = 3.3V ± 10%3.45.2mA
DRIVER ENABLED, RECEIVER ENABLED
Logic-side supply currentVRE = VGND1, loopback if full-duplex device, VD = VCC1, VCC1 = 5V ± 10%2.64.4mA
Logic-side supply currentVRE = VGND1, loopback if full-duplex device, VD = VCC1, VCC1 = 3.3V ± 10%2.64.4mA
Logic-side supply currentISO141x, VRE = VGND1, loopback if full-duplex device, D = 500kbps square wave with 50% duty cycle, VCC1 = 5V ± 10%, CL(R)(1) = 15pF3.35.1mA
Logic-side supply currentISO141x, VRE = VGND1, loopback if full-duplex device, D = 500kbps square wave with 50% duty cycle, VCC1 = 3.3V ± 10%, CL(R)(1) = 15pF3.25.1mA
Logic-side supply currentISO143x, VRE = VGND1, loopback if full-duplex device, D = 12Mbps square wave with 50% duty cycle, VCC1 = 5V ± 10%, CL(R)(1) = 15pF4.16mA
Logic-side supply currentISO143x, VRE = VGND1, loopback if full-duplex device, D= 12Mbps square wave with 50% duty cycle, VCC1 = 3.3V ± 10%, CL(R)(1) = 15pF3.85.7mA
Logic-side supply currentISO145x, VRE = VGND1, loopback if full-duplex device, D = 50Mbps square wave with 50% duty cycle, VCC1 = 5V ± 10%, CL(R)(1) = 15pF6.38.9mA
Logic-side supply currentISO145x, VRE = VGND1, loopback if full-duplex device, D= 50Mbps square wave with 50% duty cycle, VCC1 = 3.3V ± 10%, CL(R)(1) = 15pF5.37.8mA
DRIVER DISABLED, RECEIVER ENABLED
Logic-side supply currentV(A-B) ≥ 200mV, VD = VCC1, VCC1 = 5V ± 10%1.63.1mA
Logic-side supply currentV(A-B) ≥ 200mV, VD = VCC1, VCC1 = 3.3V ± 10%1.63.1mA
Logic-side supply currentISO141x, (A-B) = 500kbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5V ± 10%, CL(R)(1) = 15pF1.73.1mA
Logic-side supply currentISO141x, (A-B) = 500kbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3V ± 10%, CL(R)(1) = 15pF1.63.1mA
Logic-side supply currentISO143x, (A-B) = 12Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5V ± 10%, CL(R)(1) = 15pF2.64mA
Logic-side supply currentISO143x, (A-B) = 12Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3V ± 10%, CL(R)(1) = 15pF2.23.7mA
Logic-side supply currentISO145x, (A-B) = 50Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5V ± 10%, CL(R)(1) = 15pF4.76.7mA
Logic-side supply currentISO145x, (A-B) = 50Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3V ± 10%, CL(R)(1) = 15pF3.75.7mA
DRIVER DISABLED, RECEIVER DISABLED
Logic-side supply currentVDE = VGND1, VD = VCC1, VCC1 = 5V ± 10%1.63.1mA
Logic-side supply currentVDE = VGND1, VD = VCC1, VCC1 = 3.3V ± 10%1.63.1mA
(1) CL(R) is the load capacitance on the R pin.