SLLSFB7 March   2026 TLIN1124A-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings - IEC Specification
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Power Supply Characteristics
    7. 5.7 Electrical Characteristics
    8. 5.8 AC Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 LIN (Local Interconnect Network) Bus
        1. 7.3.1.1 LIN Transmitter Characteristics
        2. 7.3.1.2 LIN Receiver Characteristics
          1. 7.3.1.2.1 Termination
      2. 7.3.2 TXDx (Transmit Input and Output)
      3. 7.3.3 RXDx (Receive Output)
      4. 7.3.4 VSUP (Supply Voltage)
      5. 7.3.5 VIO (logic interface supply voltage)
      6. 7.3.6 GND (Ground)
      7. 7.3.7 SLP (Sleep Input)
      8. 7.3.8 INHN (Inhibit high voltage output terminal)
      9. 7.3.9 Protection Features
        1. 7.3.9.1 TXD Dominant Time Out (TXD DTO)
        2. 7.3.9.2 LIN Dominant timeout (LIN DTO)
        3. 7.3.9.3 Thermal Shutdown
        4. 7.3.9.4 Under Voltage on VSUP and VIO
        5. 7.3.9.5 Unpowered Device and LIN Bus
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Sleep Mode
      3. 7.4.3 Standby Mode
      4. 7.4.4 Wake Up Events
        1. 7.4.4.1 Wake Up Request (RXD)
        2. 7.4.4.2 Mode Transitions
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Package Option Addendum
    2. 11.2 Tape and Reel Information
    3. 11.3 Mechanical Data

7.3.8 INHN (Inhibit high voltage output terminal)

INHN is high voltage output. The optional feature controls system power management allowing for a significant reduction in battery quiescent current consumption while the application is in sleep mode. The INHN pin has two states: asserted low and high impedance (floating). The INHN pin is low in the normal and standby modes and is floating when in sleep mode. A 100kΩ pull-up to VSUP can be added to the INHN output pin for a fast transition from the driven low state to the high state, and to make sure the pin is high when left floating.

The INHN terminal should be considered a high-voltage logic terminal and not a power output. Thus should be used to drive the EN terminal of the systems power-management device. This terminal is not reverse battery protected and thus should not be connected outside the system module.