SLLSFB7 March   2026 TLIN1124A-Q1

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 ESD Ratings - IEC Specification
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Power Supply Characteristics
    7. 5.7 Electrical Characteristics
    8. 5.8 AC Switching Characteristics
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 LIN (Local Interconnect Network) Bus
        1. 7.3.1.1 LIN Transmitter Characteristics
        2. 7.3.1.2 LIN Receiver Characteristics
          1. 7.3.1.2.1 Termination
      2. 7.3.2 TXDx (Transmit Input and Output)
      3. 7.3.3 RXDx (Receive Output)
      4. 7.3.4 VSUP (Supply Voltage)
      5. 7.3.5 VIO (logic interface supply voltage)
      6. 7.3.6 GND (Ground)
      7. 7.3.7 SLP (Sleep Input)
      8. 7.3.8 INHN (Inhibit high voltage output terminal)
      9. 7.3.9 Protection Features
        1. 7.3.9.1 TXD Dominant Time Out (TXD DTO)
        2. 7.3.9.2 LIN Dominant timeout (LIN DTO)
        3. 7.3.9.3 Thermal Shutdown
        4. 7.3.9.4 Under Voltage on VSUP and VIO
        5. 7.3.9.5 Unpowered Device and LIN Bus
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Sleep Mode
      3. 7.4.3 Standby Mode
      4. 7.4.4 Wake Up Events
        1. 7.4.4.1 Wake Up Request (RXD)
        2. 7.4.4.2 Mode Transitions
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Package Option Addendum
    2. 11.2 Tape and Reel Information
    3. 11.3 Mechanical Data

Pin Configuration and Functions

TLIN1124A-Q1 RGY Package, 24-Pin (VQFN)Top View Figure 4-1 RGY Package, 24-Pin (VQFN)
Top View
Table 4-1 Pin Functions
PIN(1) TYPE DESCRIPTION
NO. NAME
1 VSUP Power High voltage supply from battery
2
NC - Not connected
3 GND GND Ground
4 LIN1 Bus I/O Channel 1 LIN Bus single-wire transmitter and receiver
5 LIN2 Bus I/O Channel 2 LIN Bus single-wire transmitter and receiver
6 GND GND Ground
7 RXD1 Digital Output Channel 1 RXD Output (push-pull) interface reporting state of LIN1 bus
8 RXD2 Digital Output Channel 2 RXD Output (push-pull) interface reporting state of LIN2 bus
9 VIO Power Logic interface supply voltage
10 GND GND Ground
11 TXD1 Digital Input Channel 1 TXD input interface to control state of LIN1 output; integrated weak pull-down and pull-up;
12 TXD2 Digital Input Channel 2 TXD input interface to control state of LIN2 output; integrated weak pull-down and pull-up;
13 TXD3 Digital Input Channel 3 TXD input interface to control state of LIN3 output; integrated weak pull-down and pull-up;
14 TXD4 Digital Input Channel 4 TXD input interface to control state of LIN4 output; integrated weak pull-down and pull-up;
15 RESERVED Digital Input For normal operation. This pin must be driven low or connected to GND
16 RXD3 Digital Output Channel 3 RXD Output (push-pull) interface reporting state of LIN3 bus
17 RXD4 Digital Output Channel 4 RXD Output (push-pull) interface reporting state of LIN4 bus
18 SLP Digital input Logic input to control state of LIN channels, integrated pull-up to VIO
19 GND GND Ground
20 LIN3 Bus I/O Channel 3 LIN Bus single-wire transmitter and receiver
21 LIN4 Bus I/O Channel 4 LIN Bus single-wire transmitter and receiver
22 GND GND Ground
23 NC - Not connected
24 INHN High voltage output Inhibit output to control system voltage, high voltage. Active low, open drain.
PAD Thermal pad - Must be grounded on PCB for optimum thermal performance
Pin 3, 6, 10, 19 and 22: All GND pins are shorted internally.