SLLU312A July   2019  – May 2022 TCAN4550-Q1

 

  1.   TCAN4550-Q1 Functional Safety-Manual
  2.   Trademarks
  3. 1Introduction
  4. 2Product Functional Safety-Capability
  5. 3Product Overview
    1. 3.1 Block Diagram
    2. 3.2 Target Applications
      1. 3.2.1 Diagnostic Features
        1. 3.2.1.1 Mode Overview
        2. 3.2.1.2 Sleep Wake Error Timer (SWE)
        3. 3.2.1.3 Undervoltage
        4. 3.2.1.4 Thermal Shut Down
        5. 3.2.1.5 CAN Bus Communication
          1. 3.2.1.5.1 M_CAN
        6. 3.2.1.6 Processor Communication
          1. 3.2.1.6.1 SPI Integrity
            1. 3.2.1.6.1.1 SPI Scratchpad
            2. 3.2.1.6.1.2 SPIERR
            3. 3.2.1.6.1.3 M_CAN Forced Dominant and Recessive
            4. 3.2.1.6.1.4 SPI and FIFO
            5. 3.2.1.6.1.5 ECC for Memory
          2. 3.2.1.6.2 Timeout Watchdog
          3. 3.2.1.6.3 Floating Pins
          4. 3.2.1.6.4 RST Pin
          5. 3.2.1.6.5 Interrupt and Internal Fault Detection
  6. 4Development Process for Management of Systematic Faults
    1. 4.1 TI New-Product Development Process
  7. 5Revision History

3.2.1.3 Undervoltage

The TCAN4550-Q1 has three undervoltage events that it monitors, UVSUP, UVIO and UVCCOUT. When the supply voltage to VSUP drops below UVSUP threshold the internal regulators may or may not provide the correct voltage levels. The VCCOUT LDO also provides 5 V for the CAN transceiver may enter UVCCOUT at this time. The device then disables the CAN transceiver and start putting the internal logic into a safe state. If VSUP drops more, it eventually reaches the power on reset level. The device comes back up as if it was the first time up once VSUP rises above the UVSUP threshold. When VIO drops below the UVIO threshold the device enters a UVIO protected state. The digital I/O and the Crystal/CLKIN need VIO to perform properly at the correct levels. These undervoltage levels help keep incorrect information off of the bus and vice versa. These help mitigate faults shown as 1, 2, 4, 5, 6 and 9. The undervoltages are covered by safety mechanism SM-02, SM-03 and SM-04.

Table 3-4 Under Voltage Lockout
VSUPVIOVCCOUTDEVICE STATEBUSRXD_INT
> UVSUP> UVVIO> UVCCOUTNormalPer TXD_INTMirrors Bus
> UVSUP> UVVIO< UVCCOUTProtectedHigh ImpedanceHigh (Recessive)
< UVSUP> UVVIONAProtectedHigh ImpedanceHigh (Recessive)
> UVSUP< UVVIO> UVCCOUTProtectedRecessiveHigh Impedance
< UVSUP< UVVIONAProtectedHigh ImpedanceHigh Impedance