CMOS op amps consist of complimentary MOS transistors (NMOS and PMOS together) throughout the device. CMOS devices typically have a low V_OS and the lowest drift of all three processes.

The CMOS differential input circuit is the same as that of the bipolar in Figure 3-1, with MOS transistors substituted for Q₁ and Q₂. The loop equation derived is identical to Equation 13. The MOSFET definition for V_GS in Equation 13 is substituted into Equation 13 and manipulated into the form of Equation 14. Here, V_OS is primarily due to differences in the threshold voltage, V_T (not to be confused with the thermal voltage, V_T, of bipolar devices). These are caused by variations in the width, length, thickness, and doping levels of the channels in the transistors (see Gray and Meyer [2]).