7 Summary

The DC parameters represent internal errors that occur as the result of mismatches between devices and components inside the op amp. The precision of the op amp is determined by the magnitude of these errors. One of the primary DC errors is the input offset voltage (V_OS) and is defined as the voltage that must be applied between the two input terminals of an op amp to obtain zero volts at the output. V_OS is symbolically represented by a voltage source that is in series with either the positive or negative input terminal, that can have either negative or positive polarity, and that varies from device to device.

V_OS is caused by the mismatch of the input transistors and components, primarily in the input stage of the op amp. Such errors are mostly introduced during fabrication of the silicon die, with a minor contribution from stresses placed on the die during the packaging process. These effects collectively produce a mismatch of the bias currents that flow through the input circuit, resulting in a voltage differential at the input terminals of the op amp.

There are three general manufacturing processes into which most op amps can be grouped: CMOS, JFET, and bipolar. CMOS devices typically have the lowest V_OS of the three, and they have the least drift. JFET devices have the worst V_OS and temperature drift. Bipolar devices have a V_OS that is close to that of CMOS devices, and a low temperature drift.

All devices are tested prior to shipment to the customer to ensure their offset is below the maximum specified in the data sheet. DC parameters are measured using a servo loop and are normally trimmed during this measurement process. Devices in multiple packages often have less trim capability because of limited space available on the die. When this occurs, V_OS varies between the single, dual, and quad packages. The op amps with bipolar and JFET inputs use a Zener diode trim technique to reduce the offset voltages. Op amps with CMOS inputs use a fuse-link trim network because a CMOS diode structure is not available. Laser trim is another alternative that is often used to lower V_OS.

An op amp's V_OS can be found in the op amp's data sheet under the input specifications table. This is done with all the error sources because the actual output created by any error source depends on the closed-loop gain (A_CL) of the circuit as seen from the error source. V_OS is multiplied by A_CL for the non-inverting circuit to be referenced to the output. There are three major V_OS specifications that may be provided for an op amp: V_OS at 25°C, V_OS full range, and V_OS drift over temperature (ΔV_OS/ΔT). The specification is fully tested and assured when the maximum or minimum values are listed. Typical specifications are not assured. Data graphs only show typical specification information.

An error budget analysis helps determine all the DC error sources in the system and the maximum contribution the design allows for each section. When the op amp or other device fails to meet the specification for V_OS, they are compensated to remove or reduce the offset. Methods of reducing the effects of V_OS include AC-coupling and DC feedback. In some applications, the solution is to use devices that have some form of internal or external calibration such as chopper stabilization, an auto-zero loop, or offset trim.

Audio amplifiers, communications circuits, and converters often use AC-coupling to remove V_OS. DC feedback is often used in measurement systems that require precision. Many devices such as instrumentation amplifiers, data converters, codecs, processors, and CMOS chopper amplifiers and Self-Cal™ amplifiers correct the offsets internally. Most of these techniques minimize V_OS only, and at only one temperature. The chopper amplifiers provide continuous correction, even over a temperature range, so they have very low drift. There are drawbacks to each method of V_OS correction that must be considered for each design.