SLTS262K October   2005  – May 2026 PTH08T210W

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Electrical Characteristics
    4. 5.4 Typical Characteristics
    5. 5.5 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview: TurboTrans™ Technology
    2. 6.2 Feature Description
      1. 6.2.1 Soft-Start Power Up
      2. 6.2.2 Remote Sense
  8. Application and Implementation
    1. 7.1 Typical Application
      1. 7.1.1 Detailed Design Procedure
        1. 7.1.1.1 Capacitor Recommendations
          1. 7.1.1.1.1 Input Capacitor (Required)
          2. 7.1.1.1.2 TurboTrans Output Capacitor
          3. 7.1.1.1.3 Non-TurboTrans Output Capacitor
          4. 7.1.1.1.4 Ceramic Capacitors
          5. 7.1.1.1.5 Tantalum, Polymer-Tantalum Capacitors
          6. 7.1.1.1.6 Capacitor Table
          7. 7.1.1.1.7 Designing for Fast Load Transients
        2. 7.1.1.2 TurboTrans™ Selection
          1. 7.1.1.2.1 RTT Resistor Selection
          2. 7.1.1.2.2 RTT Resistor Selection
          3. 7.1.1.2.3 RTT Resistor Selection
        3. 7.1.1.3 Adjusting the Output Voltage
        4. 7.1.1.4 Undervoltage Lockout (UVLO)
        5. 7.1.1.5 UVLO Adjustment
        6. 7.1.1.6 Output On/Off Inhibit
        7. 7.1.1.7 Overcurrent Protection
        8. 7.1.1.8 Overtemperature Protection (OTP)
        9. 7.1.1.9 Auto-Track™ Function
          1. 7.1.1.9.1 How Auto-Track™ Works
          2. 7.1.1.9.2 Typical Application
          3. 7.1.1.9.3 Notes on Use of Auto-Track™
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Tape and Reel and Tray Drawings

Electrical Characteristics

TA =25°C, VI = 12 V, VO = 3.3 V, CI = 470 µF, CO = 470 µF OS-CON, and IO = IO max (unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IO Output current 25°C, natural convection 0 25 A
60°C, 200 LFM 0 30
VI Input voltage range Over IO range 5.5 14 V
VO Output adjust range Over IO range 0.7 3.6 V
Set-point voltage tolerance ±1 (1) %Vo
Temperature variation –40°C < TA < 85°C ±0.3 %Vo
Line regulation Over VI range ±4 mV
Load regulation Over IO range ±7 mV
Total output variation Includes set-point, line, load, –40°C ≤ TA  ≤ 85°C ±1.5 (1) %Vo
η Efficiency IO = 26 A RSET = 1.62 kΩ, VO = 3.3 V 93%
RSET = 5.23 kΩ, VO = 2.5 V 91%
RSET = 12.7 kΩ, VO = 1.8 V 89%
RSET = 19.6 kΩ, VO = 1.5 V 89%
RSET = 35.7 kΩ, VO = 1.2 V 87%
RSET = 63.4 kΩ, VO = 1.0 V 84%
Open, VO = 0.7 V 80%
VO Ripple (peak-to-peak) 20-MHz bandwidth 25 mVPP
ILIM Overcurrent threshold Reset, followed by auto-recovery 50 A
ttr Transient response w/o TurboTrans
CO = 470 μF
Recovery time 50 µs
ΔVtr VO over/undershoot 150 mV
ttr 2.5 A/µs load step
50 to 100% IOmax
w/o TurboTrans
CO = 940 μF, Type C
Recovery time 50 µs
ΔVtr VO over/undershoot 125 mV
ttrTT w/ TurboTrans
CO = 940 μF, Type C
Recovery time 50 µs
ΔVtrTT VO over/undershoot 85 mV
IIL Track input current (pin 14) Pin to GND –130(2) µA
dVtrack/dt Track slew rate capability CO  ≤ CO (max) 1 V/ms
UVLOADJ Adjustable Undervoltage lockout (pin 1) Pin 1 open VI increasing 5 5.5 V
VI decreasing 4.1
Inhibit control (pin 1)      Input high voltage (VIH) Open(3) V
Input low voltage (VIL) –0.2 0.6
Input low current (IIL) 125 µA
Iin Input standby current Inhibit (pin 1) to GND, Track (pin 14) open 3 mA
fs Switching frequency Over VI and IO ranges 480 kHz
CI External input capacitance 470 (4) µF
CO External output capacitance w/out TurboTrans Capacitance Value Nonceramic 470 (5) 12,000 (6) µF
Ceramic 5000
Equivalent series resistance (nonceramic) 3 (7) mΩ
w/ TurboTrans Capacitance Value See TT chart (8) 12,000 (9) µF
Capacitance × ESR product (CO × ESR) 10,000 (10) μF × mΩ
MTBF Reliability Per Bellcore TR-332, 50% stress, TA = 40°C, ground benign 3.6 106 Hr
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/°C or better temperature stability.
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 14. The open-circuit voltage is less than 5 Vdc.
This control pin has an internal pullup. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. The open-circuit voltage is less than 5 Vdc. For additional information, see the related application note.
A 470 µF electrolytic input capacitor is required for proper operation. The capacitor must be rated for a minimum of 500 mA rms of ripple current.
A minimum value of external output capacitor is required for proper operation. Adding additional capacitance at the load further improves transient response. See the Capacitor Application Information section for more guidance.
This is the calculated maximum. This value includes both ceramic and non-ceramic capacitors. The minimum ESR requirement often results in a lower value. See the related Application Information for more guidance.
This is the minimum ESR for all the electrolytic (nonceramic) capacitance. Use 5 mΩ as the minimum when using manufacturer's max-ESR values to calculate.
Minimum capacitance will be determined by your transient deviation requirement. A corresponding resistor, RTT is required for proper operation. See the TurboTrans Selection section for guidance in selecting the capacitance and RTT value.
This is the calculated maximum. This value includes both ceramic and non-ceramic capacitors.
When calculating the Capacitance × ESR product use the capacitance and ESR values of a single capacitor. For an output capacitor bank of several capacitor types and values, calculate the C × ESR product using the values of the capacitor that makes up the majority of the capacitance.