SLUUCD4 April   2021 TPS92682-Q1

 

  1.   Trademarks
  2.   General Texas Instruments High Voltage Evaluation (TI HV EMV) User Safety Guidelines
  3. 1Description
    1. 1.1 Typical Applications
    2. 1.2 Warnings
    3. 1.3 Connector Description
  4. 2REACH Compliance
  5. 3Performance Specifications
    1. 3.1 SEPIC Voltage Regulator
    2. 3.2 SEPIC Current Regulator
  6. 4Performance Data and Typical Characteristic Curves
    1. 4.1 Startup Waveforms
    2. 4.2 Dynamic Performance
    3. 4.3 Faults
    4. 4.4 EMI Scan
  7. 5Schematic, PCB Layout, and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Layout
    3. 5.3 Bill of Materials
  8. 6Software
    1. 6.1 Demonstration Kit Software Installation for MSP-EXP432E401Y LaunchPad Board
    2. 6.2 Installation Error Recovery
    3. 6.3 Programming the MSP-EXP432E401Y LaunchPad Board
  9. 7TPS92682EVM-125 Power UP and Operation
    1. 7.1 SPI Command
    2. 7.2 GUI Devices Window

5.2 Layout

The TPS92682EVM-125 is a four-layer board. Figure 5-2, Figure 5-3, Figure 5-4, Figure 5-5, and Figure 5-6 illustrate the assembly, the top, the inner-layer1, the inner-layer2 and the bottom layer of the TPS92682EVM-125 PCB layout.

GUID-20200903-CA0I-RPHG-WSNM-VMQ4SQJ8Q2FB-low.gifFigure 5-2 TPS92682EVM-125 Assembly
GUID-20200903-CA0I-9DMH-XCSC-HKCLLBJ18MVM-low.gifFigure 5-3 TPS92682EVM-125 Top Layer and Top Overlay (Top View)
GUID-20200903-CA0I-WPM0-3G20-TTXVGQB9ZNWX-low.gifFigure 5-4 TPS92682EVM-125 Inner-layer 1
GUID-20200903-CA0I-HNSV-JXFF-MDGRZ8T960XG-low.gifFigure 5-5 TPS92682EVM-125 Inner-layer 2
GUID-20200903-CA0I-8P1X-XFXB-D0SSCB6KKMBG-low.gifFigure 5-6 TPS92682EVM-125 Bottom Layer (Bottom View)