SLUUCZ3A July   2024  – March 2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Test Setup
      1. 2.1.1 Test and Configuration Software
        1. 2.1.1.1 Description
        2. 2.1.1.2 Features
      2. 2.1.2 Test Equipment
        1. 2.1.2.1 Voltage Source
        2. 2.1.2.2 Multimeters
        3. 2.1.2.3 Output Load
        4. 2.1.2.4 Oscilloscope
        5. 2.1.2.5 Fan
        6. 2.1.2.6 USB-to-GPIO Interface Adapter:
        7. 2.1.2.7 Recommended Wire Gauge
      3. 2.1.3 Tip and Barrel Measurement
      4. 2.1.4 List of Test Points, Jumpers, and Connectors
      5. 2.1.5 Configuring EVM to Overdrive VDRV
    2. 2.2 Best Practices
  9. 3Software
    1. 3.1 EVM Configuration Using the Fusion GUI
      1. 3.1.1 Configuration Procedure
    2. 3.2 Using the Fusion GUI
      1. 3.2.1 Opening the Fusion GUI
      2. 3.2.2 Changing ON_OFF_CONFIG
      3. 3.2.3 SMBALERT# Mask
      4. 3.2.4 All Config
      5. 3.2.5 Pin Strapping
      6. 3.2.6 Monitor
      7. 3.2.7 Status
  10. 4Implementation Results
    1. 4.1 Test Procedure
      1. 4.1.1 Line and Load Regulation and Efficiency Measurement Procedure
      2. 4.1.2 Efficiency Measurement Test Points
      3. 4.1.3 Control Loop Gain and Phase Measurement Procedure
    2. 4.2 Performance Data and Typical Characteristic Curves
      1. 4.2.1 Efficiency
      2. 4.2.2 Transient Response
      3. 4.2.3 Control Loop Bode Plot
      4. 4.2.4 Output Ripple
      5. 4.2.5 Control On
      6. 4.2.6 Control Off
      7. 4.2.7 Control On With Prebiased Output
      8. 4.2.8 Thermal Image
  11. 5Hardware Design Files
    1. 5.1 Schematic
    2. 5.2 EVM Assembly Drawing and PCB Layout
    3. 5.3 Bill of Materials
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Revision History

5.2 EVM Assembly Drawing and PCB Layout

Figure 5-2 through Figure 5-8 show the design of the TPS546E25EVM-1PH printed circuit board.

TPS546E25EVM-1PH TPS546E25EVM-1PH Top Side Overlay View (Top View)Figure 5-2 TPS546E25EVM-1PH Top Side Overlay View (Top View)
TPS546E25EVM-1PH TPS546E25EVM-1PH Internal Layer 1 (Top View)Figure 5-4 TPS546E25EVM-1PH Internal Layer 1 (Top View)
TPS546E25EVM-1PH TPS546E25EVM-1PH Internal Layer 3 (Top View)Figure 5-6 TPS546E25EVM-1PH Internal Layer 3 (Top View)
TPS546E25EVM-1PH TPS546E25EVM-1PH Bottom Copper Layer (Top View)Figure 5-8 TPS546E25EVM-1PH Bottom Copper Layer (Top View)
TPS546E25EVM-1PH TPS546E25EVM-1PH Top Copper (Top View)Figure 5-3 TPS546E25EVM-1PH Top Copper (Top View)
TPS546E25EVM-1PH TPS546E25EVM-1PH Internal Layer 2 (Top View)Figure 5-5 TPS546E25EVM-1PH Internal Layer 2 (Top View)
TPS546E25EVM-1PH TPS546E25EVM-1PH Internal Layer 4 (Top View)Figure 5-7 TPS546E25EVM-1PH Internal Layer 4 (Top View)