SLVSDG9C
March 2016 – June 2025
TPD1E0B04
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
ESD Ratings—IEC Specification
5.4
Recommended Operating Conditions
5.5
Thermal Information
5.6
Electrical Characteristics
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
IEC 61000-4-2 ESD Protection
6.3.2
IEC 61000-4-4 EFT Protection
6.3.3
IEC 61000-4-5 Surge Protection
6.3.4
IO Capacitance
6.3.5
DC Breakdown Voltage
6.3.6
Ultra Low Leakage Current
6.3.7
Low ESD Clamping Voltage
6.3.8
Supports High Speed Interfaces
6.3.9
Industrial Temperature Range
6.3.10
Industry Standard Package
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Applications
7.2.1
USB Type-C Application
7.2.1.1
Design Requirements
7.2.1.2
Detailed Design Procedure
7.2.1.2.1
Signal Range
7.2.1.2.2
Operating Frequency
7.2.1.3
Application Curves
7.2.2
WiFi Antenna Application
7.2.2.1
Design Requirements
7.2.2.2
Detailed Design Procedure
7.2.2.2.1
Signal Range
7.2.2.2.2
Operating Frequency
7.2.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
5.7
Typical Characteristics
Figure 5-1
Positive TLP Curve
Figure 5-3
8kV IEC Waveform
Figure 5-5
Surge Curve (t
p
= 8/20µs), IO Pin to GND
Figure 5-7
Capacitance vs Bias Voltage (DPY Package)
Figure 5-9
DC Voltage Sweep I-V Curve
Figure 5-11
Insertion Loss
Figure 5-2
Negative TLP Curve
Figure 5-4
–8kV IEC Waveform
Figure 5-6
Capacitance vs Bias Voltage (DPL Package)
Figure 5-8
Leakage Current vs Temperature
Figure 5-10
Capacitance vs Frequency
Figure 5-12
USB3.1 Gen 2 10Gbps Eye Diagram (Bare Board)
Figure 5-13
USB3.1 Gen 2 10Gbps Eye Diagram (with TPD1E0B04DPL)