SLVSHI4A October   2025  – December 2025 DRV81545

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specification
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Integrated Clamp Diode, VCLAMP
      2. 6.3.2 Protection Circuits
        1. 6.3.2.1 ILIM Analog Current Limit
          1. 6.3.2.1.1 Effect of Load Resistance on Power Dissipation Before TSD
        2. 6.3.2.2 Cut-Off Delay (COD)
        3. 6.3.2.3 Thermal Shutdown (TSD)
        4. 6.3.2.4 Undervoltage Lockout (UVLO)
      3. 6.3.3 Fault Conditions Summary
    4. 6.4 Device Functional Modes
      1. 6.4.1 Hardware Interface Operation
      2. 6.4.2 Parallel Outputs
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 External Components
      2. 7.2.2 Continuous Current Capability
      3. 7.2.3 Power Dissipation
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

DRV81545 20-Pin PWP Package, HTSSOP (Top View)Figure 4-1 20-Pin PWP Package, HTSSOP (Top View)
Table 4-1 Pin Functions
PIN DESCRIPTION
NAME PWP (20) TYPE(1)
POWER AND GROUND
GND 8 GND Device ground. Connect to system ground.
NC 9 — Not connected
PGND 1, 2, 19, 20 GND Power ground. Connect to system ground.
THERMAL PAD — — Thermal Pad. Connect to system ground. Connect to a continuous ground pour copper plane with direct-connect vias for the best thermal dissipation.
VCLAMP 3, 18 PWR Connect directly to VM supply, or Zener diode to VM supply or GND
VM 13 PWR Power supply. Bypass this pin to GND with a 0.1µF capacitor as well as sufficient bulk capacitance.
CONTROL
COD 11 I Device configuration pin for Cut-off Delay. Connect to an appropriate resistor to GND to set the corresponding cut off delay. Connect directly to GND to disable this feature.
ILIM 12 I Connect a resistor between ILIM and GND to set the current limit and threshold. Do not leave this pin unconnected. Connect directly to GND for the maximum current limit setting.
IN1 4 I Controls the output of channel 1. For details, see the Hardware Interface section. Pin has internal pull-down resistor.
IN2 5 I Controls the output of channel 2. For details, see the Hardware Interface section. Pin has internal pull-down resistor.
IN3 6 I Controls the output of channel 3. For details, see the Hardware Interface section. Pin has internal pull-down resistor.
IN4 7 I Controls the output of channel 4. For details, see the Hardware Interface section. Pin has internal pull-down resistor.
nFAULT 10 O Open drain output. Pulled low when in fault condition. Connect pull-up resistor to external logic supply.
OUTPUT
OUT1 17 O Connect to load 1
OUT2 16 O Connect to load 2
OUT3 15 O Connect to load 3
OUT4 14 O Connect to load 4
(1) I = input, O = output, PWR = power, GND = ground