There are three considerations for selecting
the value of the output capacitor:
- Stability
- Steady state output voltage ripple
- Regulator transient response to a change load current
First, calculate the minimum output capacitance based on these three
requirements.
Equation 14 calculates the minimum capacitance to keep the LC double pole below the
f
P(MAX) in
Table 7-2 to meet stability requirements.
To calculate the fP(MAX), locate the correct Kf_LC in Table 7-2. By default, this part comes pre-programmed with RAMP3 and SEL_SUMCOMP = 0 as
it's compensation settings. In this example, Kf_LC = 9.6 and
VREF_DAC = VOUT_COMMAND × VOSL = 3.3V × 0.125V/V = 0.4125V. After you
determine the correct Kf_LC and VREF_DAC, plug both values
into Equation 2. For this example application, fP(MAX) = 14.947kHz. Plug the
calculated fP(MAX) into Equation 14 to determine your minimum required Cout for stability.
Equation 15 calculates the minimum capacitance to meet the
steady state output voltage ripple requirement of 16mV. These calculations are for CCM
operation and does not include the portion of the output voltage ripple caused by the
ESR or ESL of the output capacitors.
Equation 14.
Equation 15.
Equation 17and Equation 18 calculate the minimum capacitance to meet the transient response
requirement of 99mV with a 10A step. These equations calculate the
necessary output capacitance to hold the output voltage steady while the inductor
current ramps up or ramps down after a load step.
Equation 16.
Equation 17.
Equation 18.
The
output capacitance needed to meet the overshoot requirement is the highest value, so
this sets the required minimum output capacitance for this example. Stability
requirements can also limit the maximum output capacitance. Equation 19 calculates the recommended maximum output
capacitance. This calculation keeps the LC double pole above 1/100th the
fSW.
Equation 19.
Using
more output capacitance is possible, but the stability must be checked through a
bode plot or transient response measurement. The selected output capacitance is 6 × 47μF, 10V ceramic capacitors.
When using ceramic capacitors, the capacitance must be derated due to DC and AC bias
effects. The selected capacitors derate to 75% the nominal value giving an effective total capacitance of 211μF. This effective capacitance meets the minimum and maximum
requirements.
This application
uses all ceramic capacitors so the effects of ESR on the ripple and transient are
ignored. If using non ceramic capacitors, as a starting point, the ESR must be below
the values calculated in Equation 20 to meet the ripple requirement and Equation 21 to meet the transient requirement. For more accurate calculations or if using
mixed output capacitors, the impedance of the output capacitors must be used to
determine if the ripple and transient requirements can be met.
Equation 20.
Equation 21.