When a thermal shutdown occurs, the device shuts off and implements a retry protection mechanism to improve system reliability. Figure 8-20 explains how the device responds depending on the load current and duration of the overcurrent event.

For load current lower than current limit, device enters into infinite thermal shutdown retry cycles phase until the device recovers from the thermal shutdown fault. In this case, the device turn off time depends on cooling time needed (with inherent 200μs delay) for T_ABS or T_REL to fall below the T_HYS level. Device can latch off if device doesn’t retry for approximately 500ms. This can happen in cases when complete PCB heats to hot ambient temperature. In this case device has slow cooling as surrounding PCB is also at high temperature, which can result in cooling time more than 500ms and device can enter latch off state.

Once the device latches off, bring the EN pin from high to low (with minimum pulse duration of about 20us) to reset the FLT and SNS signal. The output of the channel then follows the EN pin after the initial toggle from high to low.

For load current higher than current limit, device implements a finite retry cycles phase protection mechanism based on the duration of the overcurrent event, that can trigger when either of the below fault conditions occur:

1. Absolute thermal shutdown (T_ABS): T_J,FET > T_ABS

2. Relative thermal shutdown (T_REL): T_J,FET – T_J,CONTROLLER > T_REL

3. Overcurrent events : I_CB or I_CL

The finite retry cycles phase protection mechanism has below durations:

1. Initial Retry Window (t < t_{RETRY_WINDOW}):

   • After I_CB or thermal shutdown triggers.
   • Retry attempts occur every t_{RETRY, INT} minimum duration.
   • Each retry can start with I_CB peak followed by current limit (I_CL) peaks with thermal regulation based on ILIM setting.

2. Extended Overcurrent Window (t > t_{RETRY_WINDOW}):

   • Limited to six retry attempts.
   • First retry cycle happens with minimum t_{RETRY, EXTD}/2 duration.
   • Successive five retry cycles happen with minimum t_{RETRY, EXTD} duration.
   • Current peaks are typically limited to I_CL with no thermal regulation.

3. Latch-off Condition:

   • After 6 unsuccessful retry attempts.
   • Requires EN pin toggle to reset.

In any of the above retry cases the device restarts when below "restart" conditions are fullfilled.

1. Temperature Recovery: when T_J,FET < (T_ABS - T_HYS) and (T_J,FET – T_J,CONTROLLER ) < (T_REL - T_HYS)
2. Retry Window: For I_LOAD > I_CL, appropriate t_{RETRY_WINDOW} interval must elapse.

In case of I_LOAD > I_CL, if the retry timer has expired and the temperature of T_ABS or T_REL has not recovered below the T_HYS level, the channel does not retry until the temperature falls below the T_HYS level. Once a channel latches off due to an extended overcurrent event, the EN pin can be brought from high to low (with minimum pulse duration of about 20us) to reset the FLT and SNS signal. The output of the channel then follows the EN pin after the initial toggle from high to low.

The following figures show how the device retries after a hot-short with and without thermal regulation, respectively. When the device experiences a thermal fault and enters the retry cycle, the first current peak in initial retry window reaches I_CB threshold, triggering fast trip circuit breaker. Successive current peaks are lower and correspond to set current limit (I_CL) value.

In case the device enters finite retry cycles phase protection mechanism due to current limit fault, the device can stay in current limit fault in initial retry window until it hits thermal shutdown. If thermal shutdown is not triggered, then it directly enters thermal shutdown retry behavior in extended overcurrent window.