SLVSIC6
August 2026
DRV81325-Q1
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
Pin Functions
5
Specification
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Transient Thermal Impedance & Current Capability
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.2.1
Control interface / Power input
6.2.2
Shunt sensing support
6.2.3
Paralleling of channels
6.3
Protection Circuits
6.3.1
Overvoltage clamp
6.3.1.1
Demagnetization energy capability
6.3.2
Single pulse clamping capability
6.3.3
Overcurrent limit
6.3.3.1
Current limiting when channels paralleled
6.3.4
Thermal Shutdown (TSD)
6.3.4.1
Dynamic Overtemperature Stress (ΔTDYN)
6.3.4.2
Absolute Overtemperature (TSD)
6.3.5
Undervoltage Lockout (UVLO)
6.3.6
Summary of STATUS pin response
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
External Components
7.3
Transient thermal performance
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
7.5
Thermal Consideration
7.5.1
Power Dissipation
7.5.2
Heatsinking
7
Device and Documentation Support
7.1
Documentation Support
7.1.1
Related Documentation
7.2
Community Resources
7.3
Trademarks
Mechanical, Packaging, and Orderable Information
5.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins
(1)
±2000
V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins
(2)
±750
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.