SLVSIC6 August   2026 DRV81325-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specification
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Transient Thermal Impedance & Current Capability
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
      1. 6.2.1 Control interface / Power input
      2. 6.2.2 Shunt sensing support
      3. 6.2.3 Paralleling of channels
    3. 6.3 Protection Circuits
      1. 6.3.1 Overvoltage clamp
        1. 6.3.1.1 Demagnetization energy capability
      2. 6.3.2 Single pulse clamping capability
      3. 6.3.3 Overcurrent limit
        1. 6.3.3.1 Current limiting when channels paralleled
      4. 6.3.4 Thermal Shutdown (TSD)
        1. 6.3.4.1 Dynamic Overtemperature Stress (ΔTDYN)
        2. 6.3.4.2 Absolute Overtemperature (TSD)
      5. 6.3.5 Undervoltage Lockout (UVLO)
      6. 6.3.6 Summary of STATUS pin response
  8.   Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 External Components
    3. 7.3 Transient thermal performance
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
    5. 7.5 Thermal Consideration
      1. 7.5.1 Power Dissipation
      2. 7.5.2 Heatsinking
  9. 7Device and Documentation Support
    1. 7.1 Documentation Support
      1. 7.1.1 Related Documentation
    2. 7.2 Community Resources
    3. 7.3 Trademarks
  10.   Mechanical, Packaging, and Orderable Information

Heatsinking

The DRV81325DDA package uses an HSOIC package with an exposed PowerPAD™. The PowerPAD package uses an exposed pad to remove heat from the device. For proper operation, this pad must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom layers.

For details about how to design the PCB, see the TI Application Report, PowerPAD Thermally Enhanced Package (SLMA002), and TI Application Brief, PowerPAD Made Easy (SLMA004), available at www.ti.com.