SLVSIZ2 April   2026 FAN31790

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Power Supply
    6. 5.6 Fan Controller Characteristics
    7. 5.7 External Crystal Parameters
    8. 5.8 Digital IO
      1. 5.8.1 Electrical Characteristics
      2. 5.8.2 Switching Characteristics
    9. 5.9 I2C Characteristics
      1. 5.9.1 I2C Filter
      2. 5.9.2 I2C Timing Diagram
  7. 6 Detailed Description
    1. 6.1 Fan Control
      1. 6.1.1 PWM Mode
      2. 6.1.2 RPM Mode
      3. 6.1.3 Rate-of-Change Control
      4. 6.1.4 Spin-Up
      5. 6.1.5 Sequential Fan Start
      6. 6.1.6 FULL_SPEED Input
      7. 6.1.7 I2C Watchdog Timer
      8. 6.1.8 Power-on Reset Configuration Pins
    2. 6.2 Fan Monitoring
      1. 6.2.1 Tachometer Signals
      2. 6.2.2 PWM Outputs as Tachometer Inputs
    3. 6.3 Fan Faults and Failures
      1. 6.3.1 PWM Mode Failure Detection
      2. 6.3.2 RPM Mode Failure Detection
      3. 6.3.3 Locked Rotor Mode Failure Detection
      4. 6.3.4 Failure Indication
    4. 6.4 I2C Interface
      1. 6.4.1 I2C Addresses and ADDRx Pins
      2. 6.4.2 I2C Command Structure
  8. 7 Register Map
  9. 8 Register Descriptions
    1. 8.1 Global Configuration Registers
    2. 8.2 Fan Fault Registers
    3. 8.3 TACH and PWM Status Registers
    4. 8.4 PWM Duty Cycle Control Registers
    5. 8.5 TACH Target Count Registers
    6. 8.6 Window Registers
  10. 9 Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
      2. 9.1.2 Configuration Examples
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

6.4.2 I2C Command Structure

Device Memory Address

During an I2C write operation to the FAN31790, the controller must transmit a memory address to identify the memory location where the FAN31790 is to store the data. The memory address is always the second byte transmitted during a write operation following the FAN31790 address byte.

Writing To and Reading From the Registers and Memory

To write a single byte to the FAN31790, the controller must generate a START condition, write the address byte (R/W = 0), write the memory address, write the byte of data, and generate a STOP condition. The controller must read theFAN31790’s acknowledgment during all byte write operations. This method can be used to write in the register/memory of the FAN31790.

Unlike the write operation that uses the specified memory address byte to define where the data is to be written, the read operation occurs at the present value of the memory address counter. To read a single byte from the FAN31790, the controller generates a START condition, writes the address byte with R/W =1, reads the data byte with a NACK to indicate the end of the transfer, and generates a STOP condition. However, since requiring the controller to keep track of the memory address counter is impractical, the following method should be used to perform reads from a specified memory location. From here, the controller can manipulate the Address Counter for Reads by forcing the address counter to a particular value. To do this, the controller generates a START condition, writes the address byte (R/W = 0), writes the memory address where it desires to read, generates a repeated START condition, writes the address byte (R/W = 1), reads data with ACK or NACK as applicable, and generates a STOP condition. Recall that the controller must NACK the last byte to inform the FAN31790 that no additional bytes are to be read.

Finally, if the controller wants to read multiple bytes from the FAN31790, the controller simply ACKs the data byte if it desires to read another byte before terminating the transaction. After the FAN31790 reads the last byte, it must NACK to indicate the end of the transfer and generate a STOP condition.

FAN31790 FAN31790 I2C Register InterfaceFigure 6-2 FAN31790 I2C Register Interface.