SLVSIZ2 April   2026 FAN31790

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Power Supply
    6. 5.6 Fan Controller Characteristics
    7. 5.7 External Crystal Parameters
    8. 5.8 Digital IO
      1. 5.8.1 Electrical Characteristics
      2. 5.8.2 Switching Characteristics
    9. 5.9 I2C Characteristics
      1. 5.9.1 I2C Filter
      2. 5.9.2 I2C Timing Diagram
  7. 6 Detailed Description
    1. 6.1 Fan Control
      1. 6.1.1 PWM Mode
      2. 6.1.2 RPM Mode
      3. 6.1.3 Rate-of-Change Control
      4. 6.1.4 Spin-Up
      5. 6.1.5 Sequential Fan Start
      6. 6.1.6 FULL_SPEED Input
      7. 6.1.7 I2C Watchdog Timer
      8. 6.1.8 Power-on Reset Configuration Pins
    2. 6.2 Fan Monitoring
      1. 6.2.1 Tachometer Signals
      2. 6.2.2 PWM Outputs as Tachometer Inputs
    3. 6.3 Fan Faults and Failures
      1. 6.3.1 PWM Mode Failure Detection
      2. 6.3.2 RPM Mode Failure Detection
      3. 6.3.3 Locked Rotor Mode Failure Detection
      4. 6.3.4 Failure Indication
    4. 6.4 I2C Interface
      1. 6.4.1 I2C Addresses and ADDRx Pins
      2. 6.4.2 I2C Command Structure
  8. 7 Register Map
  9. 8 Register Descriptions
    1. 8.1 Global Configuration Registers
    2. 8.2 Fan Fault Registers
    3. 8.3 TACH and PWM Status Registers
    4. 8.4 PWM Duty Cycle Control Registers
    5. 8.5 TACH Target Count Registers
    6. 8.6 Window Registers
  10. 9 Application and Implementation
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
      2. 9.1.2 Configuration Examples
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

7 Register Map

All registers are 8 bits (1 byte) each but they are also grouped into pages of 8 registers per page. The I2C controller can read or write single bytes or consecutive bytes. When writing consecutive register bytes, they must all be on the same page. If the final register on a page is reached and another byte is written, then the register address pointer will loop back to the start of the page and the byte will be written to the first register on that page.

Consecutive reads are not limited to a single page. A continuous read can will continue all the way until the end of the register map. After the last register in the register map, a continuous read will return 0xFF until the address reaches FFh. It will then loop back up to 0x00 at the top of the register map.

Some registers default reset states are configured by hardware input pins at power up. These register reset values are marked with an X. All User Byte registers are just general-purpose volatile memory.

Table 7-1 Register Map
ADDR NAME R/W RESET BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
GLOBAL CONFIGURATION REGISTERS
Memory Page 0
00h Global Configuration R/W 0010 0XX0b Run/Standby 0 = Run 1 = Standby Reset: 0 = Normal 1 = Reset Bus Timeout 0 = Enabled RESERVED OSC: 0 = Internal oscillator 1 = External crystal I2C Watchdog: 00b = Disabled 01b = 5s 10b = 10s 11b = 30s I2C Watchdog Status 1 = Watchdog fault detected
01h PWM Frequency R/W FREQ_START PWM4-PWM6 Frequency: 0000b = 25Hz 0001b = 30Hz (FREQ_START = GND) 0010b = 35Hz 0011b = 100Hz 0100b = 125Hz 0101b = 149.7Hz 0110b = 1.25kHz 0111b = 1.47kHz (FREQ_START = Floating) 1000b = 3.57kHz 1001b = 5kHz 1010b = 12.5kHz 1011b = 25kHz (FREQ_START = VCC) PWM1-PWM3 Frequency: 0000b = 25Hz 0001b = 30Hz (FREQ_START = GND) 0010b = 35Hz 0011b = 100Hz 0100b = 125Hz 0101b = 149.7Hz 0110b = 1.25kHz 0111b = 1.47kHz (FREQ_START = Floating) 1000b = 3.57kHz 1001b = 5kHz 1010b = 12.5kHz 1011b = 25kHz (FREQ_START = VCC)
02h Fan 1 Configuration R/W 0XX0 0000b Mode: 0 = PWM 1 = RPM Spin-Up 00b = No Spin-up 01b = 2 TACH counts or 0.5s 10b = 2 TACH counts or 1s 11b = 2 TACH counts or 2s Control/Monitor 0 = Control 1 = Monitor only TACH Input Enable 1 = Enabled TACH/ Locked Rotor 0 = TACH 1 = Locked Rotor Locked Rotor Polarity 0 = Low 1 = High PWM/TACH 0 = PWM 1 = TACH
03h Fan 2 Configuration R/W 0XX0 0000b Same as Fan 1 Configuration
04h Fan 3 Configuration R/W 0XX0 0000b Same as Fan 1 Configuration
05h Fan 4 Configuration R/W 0XX0 0000b Same as Fan 1 Configuration
06h Fan 5 Configuration R/W 0XX0 0000b Same as Fan 1 Configuration
07h Fan 6 Configuration R/W 0XX0 0000b Same as Fan 1 Configuration
Memory Page 1
08h Fan 1 Dynamics R/W 0100 1100b Speed Range (TACH Periods Counted) 000b = 1 001b = 2 010b = 4 (default) 011b = 8 100b = 16 101b = 32 110b = 32 111b = 32 PWM Rate-of-Change: 000b = 0ms per LSB (PWM) 000b = 0.9765ms per LSB (RPM) 001b = 1.953125ms per LSB 010b = 3.90625ms per LSB 011b = 7.8125ms per LSB (default) 100b = 15.625ms per LSB 101b = 31.25ms per LSB 110b = 62.5ms per LSB 111b = 125ms per LSB Asymmetric Rate of Change 1 = Enabled RESERVED
09h Fan 2 Dynamics R/W 0100 1100b Same as Fan 1 Dynamics
0Ah Fan 3 Dynamics R/W 0100 1100b Same as Fan 1 Dynamics
0Bh Fan 4 Dynamics R/W 0100 1100b Same as Fan 1 Dynamics
0Ch Fan 5 Dynamics R/W 0100 1100b Same as Fan 1 Dynamics
0Dh Fan 6 Dynamics R/W 0100 1100b Same as Fan 1 Dynamics
0Eh User Byte R/W 0000 0000b
0Fh User Byte R/W 0000 0000b
FAN FAULT REGISTERS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Memory Page 2
10h Fan Fault Status 2 R 0000 0000b RESERVED RESERVED Fan 12 Fault 1 = Fault Fan 11 Fault 1 = Fault Fan 10 Fault 1 = Fault Fan 9 Fault 1 = Fault Fan 8 Fault 1 = Fault Fan 7 Fault 1 = Fault
11h Fan Fault Status 1 R 0000 0000b RESERVED RESERVED Fan 6 Fault 1 = Fault Fan 5 Fault 1 = Fault Fan 4 Fault 1 = Fault Fan 3 Fault 1 = Fault Fan 2 Fault 1 = Fault Fan 1 Fault 1 = Fault
12h Fan Fault Mask 2 R/W 0011 1111b RESERVED RESERVED Fan 12 Mask 1 = Masked Fan 11 Mask 1 = Masked Fan 10 Mask 1 = Masked Fan 9 Mask 1 = Masked Fan 8 Mask 1 = Masked Fan 7 Mask 1 = Masked
13h Fan Fault Mask 1 R/W 0011 1111b RESERVED RESERVED Fan 6 Mask 1 = Masked Fan 5 Mask 1 = Masked Fan 4 Mask 1 = Masked Fan 3 Mask 1 = Masked Fan 2 Mask 1 = Masked Fan 1 Mask 1 = Masked
14h Failed Fan Options/ Sequential Start R/W 0100 0101b Sequential Start Delay 000b = 0s 001b = 250ms 010b = 500ms 011b = 1s 100b = 2s 101b, 110b, 111b = 4s RESERVED Failed Fan Options 00b = duty cycle = 0% on fail 01b = Continue PWM or RPM mode operation on fail. 10b = duty cycle = 100% on fail 11b = All fans to 100% on any unmasked fan failure. Fan Faut Queue 00b = 1 fault 01b = 2 faults 10b = 4 faults 11b = 6 faults
15h User Byte R/W 0000 0000b
16h User Byte R/W 0000 0000b
17h User Byte R/W 0000 0000b
Table 7-2 Register Map Continued
ADDR NAME R/W RESET BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
TACH AND PWM STATUS REGISTERS
Memory Page 3
18h TACH 1 Count MSB R 1111 1111b DATA
19h LSB R 1110 0000b DATA R-0h
1Ah TACH 2 Count MSB R 1111 1111b Same as TACH 1 Count
1Bh LSB R 1110 0000b
1Ch TACH 3 Count MSB R 1111 1111b Same as TACH 1 Count
1Dh LSB R 1110 0000b
1Eh TACH 4 Count MSB R 1111 1111b Same as TACH 1 Count
1Fh LSB R 1110 0000b
Memory Page 4
20h TACH 5 Count MSB R 1111 1111b Same as TACH 1 Count
21h LSB R 1110 0000b
22h TACH 6 Count MSB R 1111 1111b Same as TACH 1 Count
23h LSB R 1110 0000b
24h TACH 7 Count MSB R 1111 1111b Same as TACH 1 Count
25h LSB R 1110 0000b
26h TACH 8 Count MSB R 1111 1111b Same as TACH 1 Count
27h LSB R 1110 0000b
Memory Page 5
28h TACH 9 Count MSB R 1111 1111b Same as TACH 1 Count
29h LSB R 1110 0000b
2Ah TACH 10 Count MSB R 1111 1111b Same as TACH 1 Count
2Bh LSB R 1110 0000b
2Ch TACH 11 Count MSB R 1111 1111b Same as TACH 1 Count
2Dh LSB R 1110 0000b
2Eh TACH 12 Count MSB R 1111 1111b Same as TACH 1 Count
2Fh LSB R 1110 0000b
Memory Page 6
30h PWMOUT 1 Duty Cycle Status MSB R 0000 0000b DATA
31h LSB R 0000 0000b DATA R-0h
32h PWMOUT 2 Duty Cycle Status MSB R 0000 0000b Same as PWMOUT 1 Duty Cycle
33h LSB R 0000 0000b
34h PWMOUT 3 Duty Cycle Status MSB R 0000 0000b Same as PWMOUT 1 Duty Cycle
35h LSB R 0000 0000b
36h PWMOUT 4 Duty Cycle Status MSB R 0000 0000b Same as PWMOUT 1 Duty Cycle
37h LSB R 0000 0000b
Memory Page 7
38h PWMOUT 5 Duty Cycle Status MSB R 0000 0000b Same as PWMOUT 1 Duty Cycle
39h LSB R 0000 0000b
3Ah PWMOUT 6 Duty Cycle Status MSB R 0000 0000b Same as PWMOUT 1 Duty Cycle
3Bh LSB R 0000 0000b
3Ch RESERVED R 0000 0000b R-0h
3Dh RESERVED R 0000 0000b R-0h
3Eh RESERVED R 0000 0000b R-0h
3Fh RESERVED R 0000 0000b R-0h
PWM DUTY CYCLE CONTROL REGISTERS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Memory Page 8
40h PWMOUT1 Target Duty Cycle MSB R/W PWM_START DATA
41h LSB R/W PWM_START DATA RESERVED
42h PWMOUT2 Target Duty Cycle MSB R/W PWM_START Same as PWMOUT 1 Target Duty Cycle
43h LSB R/W PWM_START
44h PWMOUT3 Target Duty Cycle MSB R/W PWM_START Same as PWMOUT 1 Target Duty Cycle
45h LSB R/W PWM_START
46h PWMOUT4 Target Duty Cycle MSB R/W PWM_START Same as PWMOUT 1 Target Duty Cycle
47h LSB R/W PWM_START
Memory Page 9
48h PWMOUT5 Target Duty Cycle MSB R/W PWM_START Same as PWMOUT 1 Target Duty Cycle
49h LSB R/W PWM_START
4Ah PWMOUT6 Target Duty Cycle MSB R/W PWM_START Same as PWMOUT 1 Target Duty Cycle
4Bh LSB R/W PWM_START
4Ch User Byte R/W 0000 0000b
4Dh User Byte R/W 0000 0000b
4Eh User Byte R/W 0000 0000b
4Fh User Byte R/W 0000 0000b
TACH TARGET COUNT REGISTERS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Memory Page 10
50h TACH 1 Target Count MSB R/W 0011 1100b DATA
51h LSB R/W 0000 0000b DATA RESERVED
52h TACH 2 Target Count MSB R/W 0011 1100b Same as TACH 1 Target Count
53h LSB R/W 0000 0000b
54h TACH 3 Target Count MSB R/W 0011 1100b Same as TACH 1 Target Count
55h LSB R/W 0000 0000b
56h TACH 4 Target Count MSB R/W 0011 1100b Same as TACH 1 Target Count
57h LSB R/W 0000 0000b
Memory Page 11
58h TACH 5 Target Count MSB R/W 0011 1100b Same as TACH 1 Target Count
59h LSB R/W 0000 0000b
5Ah TACH 6 Target Count MSB R/W 0011 1100b Same as TACH 1 Target Count
5Bh LSB R/W 0000 0000b
5Ch User Byte R/W 0000 0000b
5Dh User Byte R/W 0000 0000b
5Eh User Byte R/W 0000 0000b
5Fh User Byte R/W 0000 0000b
WINDOW REGISTERS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Memory Page 12
60h Window 1 R/W 0000 0000b DATA
61h Window 2 R/W 0000 0000b Same as Window 1
62h Window 3 R/W 0000 0000b Same as Window 1
63h Window 4 R/W 0000 0000b Same as Window 1
64h Window 5 R/W 0000 0000b Same as Window 1
65h Window 6 R/W 0000 0000b Same as Window 1
66h User Byte R/W 0000 0000b
67h User Byte R/W 0000 0000b
DEVICE REVISION REGISTERS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
Memory Page 13
68h Device Major Revision R 0000 0001b Initial Major Revision = 0x01
69h Device Minor Revision R 0000 0000b Initial Minor Revision = 0x00
6Ah Device ID R 0000 0000b Device Identifiers. 0x00 = FAN31790