SLVSJP8 October   2025 TRF3302-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics - GPS L1 Band
    6. 5.6 Electrical Characteristics - GPS L5 and L2 Bands
    7. 5.7 Typical Characteristics – GPS L1 Band
    8. 5.8 Typical Characteristics – GPS L5 and L2 Bands
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 The TRF3302-Q1 in a Multiband Configuration
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

Figure 4-1 VBL Package, 6-Pin WSON-FCRLF (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NO. NAME
1 GND Ground RF and dc ground. Connect to PCB ground plane.
2 RFIN Input RF input. Optional external dc-blocking capacitor. Internally matched to 50Ω.
3 VCC Power Power supply.
4 EN Input Device enable signal, referenced to ground. Voltage must be forced.
Logic 1 = enable.
Logic 0 = power down.
5 RFOUT Output RF output. Integrated dc-blocking capacitor and internally matched to 50Ω.
6 GND Ground RF and dc ground. Connect to PCB ground plane.