SLVSJZ0 October   2025 MCF8316D-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Auto
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Characteristics of the SDA and SCL bus for Standard and Fast mode
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Output Stage
      2. 6.3.2  Device Interface
        1. 6.3.2.1 Interface - Control and Monitoring
        2. 6.3.2.2 I2C Interface
      3. 6.3.3  Step-Down Mixed-Mode Buck Regulator
        1. 6.3.3.1 Buck in Inductor Mode
        2. 6.3.3.2 Buck in Resistor mode
        3. 6.3.3.3 Buck Regulator with External LDO
        4. 6.3.3.4 AVDD Power Sequencing from Buck Regulator
        5. 6.3.3.5 Mixed Mode Buck Operation and Control
      4. 6.3.4  AVDD Linear Voltage Regulator
      5. 6.3.5  Charge Pump
      6. 6.3.6  Slew Rate Control
      7. 6.3.7  Cross Conduction (Dead Time)
      8. 6.3.8  Motor Control Input Sources
        1. 6.3.8.1 Analog-Mode Motor Control
        2. 6.3.8.2 PWM-Mode Motor Control
        3. 6.3.8.3 I2C-based Motor Control
        4. 6.3.8.4 Frequency-Mode Motor Control
        5. 6.3.8.5 Input Reference Profiles
          1. 6.3.8.5.1 Linear Control Profiles
          2. 6.3.8.5.2 Staircase Control Profiles
          3. 6.3.8.5.3 Forward-Reverse Profiles
          4. 6.3.8.5.4 Multi-Reference Mode Operation
          5. 6.3.8.5.5 Input Reference Transfer Function without Profiler
      9. 6.3.9  Starting the Motor Under Different Initial Conditions
        1. 6.3.9.1 Case 1 – Motor is Stationary
        2. 6.3.9.2 Case 2 – Motor is Spinning in the Forward Direction
        3. 6.3.9.3 Case 3 – Motor is Spinning in the Reverse Direction
      10. 6.3.10 Motor Start Sequence (MSS)
        1. 6.3.10.1 Initial Speed Detect (ISD)
        2. 6.3.10.2 Motor Resynchronization
        3. 6.3.10.3 Reverse Drive
          1. 6.3.10.3.1 Reverse Drive Tuning
        4. 6.3.10.4 Motor Start-up
          1. 6.3.10.4.1 Align
          2. 6.3.10.4.2 Double Align
          3. 6.3.10.4.3 Initial Position Detection (IPD)
            1. 6.3.10.4.3.1 IPD Operation
            2. 6.3.10.4.3.2 IPD Release Mode
            3. 6.3.10.4.3.3 IPD Advance Angle
          4. 6.3.10.4.4 Slow First Cycle Startup
          5. 6.3.10.4.5 Open Loop
          6. 6.3.10.4.6 Transition from Open to Closed Loop
      11. 6.3.11 Closed Loop Operation
        1. 6.3.11.1 Closed Loop Acceleration/Deceleration Slew Rate
        2. 6.3.11.2 Speed PI Control
        3. 6.3.11.3 Current PI Control
        4. 6.3.11.4 Power Control Mode
        5. 6.3.11.5 Current (Torque) Control Mode
        6. 6.3.11.6 Modulation Index Control
        7. 6.3.11.7 Overmodulation
        8. 6.3.11.8 Motor Speed Limit
        9. 6.3.11.9 Input DC Power Limit
      12. 6.3.12 Flux Weakening Control
      13. 6.3.13 Motor Parameters
        1. 6.3.13.1 Motor Resistance
        2. 6.3.13.2 Motor Inductance
        3. 6.3.13.3 Motor Back-EMF constant
      14. 6.3.14 Motor Parameter Extraction Tool (MPET)
      15. 6.3.15 Anti-Voltage Surge (AVS)
      16. 6.3.16 Active Braking
      17. 6.3.17 Output PWM Switching Frequency
      18. 6.3.18 PWM Dithering
      19. 6.3.19 PWM Modulation Schemes
      20. 6.3.20 Dead Time Compensation
      21. 6.3.21 Motor Stop Options
        1. 6.3.21.1 Coast (Hi-Z) Mode
        2. 6.3.21.2 Recirculation Mode
        3. 6.3.21.3 Low-Side Braking
        4. 6.3.21.4 High-Side Braking
        5. 6.3.21.5 Active Spin-Down
      22. 6.3.22 Align Braking
      23. 6.3.23 FG Configuration
        1. 6.3.23.1 FG Output Frequency
        2. 6.3.23.2 FG during Open and Closed Loop States
        3. 6.3.23.3 FG during Fault and Idle States
      24. 6.3.24 Protections
        1. 6.3.24.1  VM Supply Undervoltage Lockout
        2. 6.3.24.2  AVDD Undervoltage Lockout (AVDD_UV)
        3. 6.3.24.3  BUCK Under Voltage Lockout (BUCK_UV)
        4. 6.3.24.4  VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 6.3.24.5  Overvoltage Protection (OVP)
        6. 6.3.24.6  Overcurrent Protection (OCP)
          1. 6.3.24.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 6.3.24.6.2 OCP Automatic Retry (OCP_MODE = 01b)
        7. 6.3.24.7  Buck Overcurrent Protection
        8. 6.3.24.8  Hardware Lock Detection Current Limit (HW_LOCK_ILIMIT)
          1. 6.3.24.8.1 HW_LOCK_ILIMIT Latched Shutdown
          2. 6.3.24.8.2 HW_LOCK_ILIMIT Automatic Recovery
          3. 6.3.24.8.3 HW_LOCK_ILIMIT Report Only
          4. 6.3.24.8.4 HW_LOCK_ILIMIT Disabled
        9. 6.3.24.9  Lock Detection Current Limit (LOCK_ILIMIT)
          1. 6.3.24.9.1 LOCK_ILIMIT Latched Shutdown
          2. 6.3.24.9.2 LOCK_ILIMIT Automatic Recovery
          3. 6.3.24.9.3 LOCK_ILIMIT Report Only
          4. 6.3.24.9.4 LOCK_ILIMIT Disabled
        10. 6.3.24.10 Motor Lock Detection
          1. 6.3.24.10.1 Lock 1: Abnormal Speed (ABN_SPEED)
          2. 6.3.24.10.2 Lock 2: Abnormal BEMF (ABN_BEMF)
          3. 6.3.24.10.3 Lock3: No-Motor Fault (NO_MTR)
        11. 6.3.24.11 Motor Lock (MTR_LCK)
          1. 6.3.24.11.1 MTR_LCK Latched Shutdown
          2. 6.3.24.11.2 MTR_LCK Automatic Recovery
          3. 6.3.24.11.3 MTR_LCK Report Only
          4. 6.3.24.11.4 MTR_LCK Disabled
        12. 6.3.24.12 EEPROM Fault
        13. 6.3.24.13 I2C CRC Fault
        14. 6.3.24.14 Minimum VM (Undervoltage) Protection
        15. 6.3.24.15 Maximum VM (Overvoltage) Protection
        16. 6.3.24.16 MPET Faults
        17. 6.3.24.17 IPD Faults
        18. 6.3.24.18 FET Thermal Warning (OTW)
        19. 6.3.24.19 FET Thermal Shutdown (TSD_FET)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Functional Modes
        1. 6.4.1.1 Sleep Mode
        2. 6.4.1.2 Standby Mode
        3. 6.4.1.3 Fault Reset (CLR_FLT)
    5. 6.5 External Interface
      1. 6.5.1 DRVOFF Functionality
      2. 6.5.2 DAC outputs
      3. 6.5.3 Current Sense Output
      4. 6.5.4 Oscillator Source
        1. 6.5.4.1 External Clock Source
      5. 6.5.5 External Watchdog
    6. 6.6 EEPROM access and I2C interface
      1. 6.6.1 EEPROM Access
        1. 6.6.1.1 EEPROM Write
        2. 6.6.1.2 EEPROM Read
        3. 6.6.1.3 EEPROM Security
      2. 6.6.2 I2C Serial Interface
        1. 6.6.2.1 I2C Data Word
        2. 6.6.2.2 I2C Write Transaction
        3. 6.6.2.3 I2C Read Transaction
        4. 6.6.2.4 I2C Communication Protocol Packet Examples
        5. 6.6.2.5 I2C Clock Stretching
        6. 6.6.2.6 CRC Byte Calculation
  8. 7 EEPROM (Non-Volatile) Register Map
    1. 7.1 Algorithm_Configuration Registers
    2. 7.2 Fault_Configuration Registers
    3. 7.3 Hardware_Configuration Registers
    4. 7.4 Internal_Algorithm_Configuration Registers
  9. 8 RAM (Volatile) Register Map
    1. 8.1 Fault_Status Registers
    2. 8.2 System_Status Registers
    3. 8.3 Device_Control Registers
    4. 8.4 Algorithm_Control Registers
    5. 8.5 Algorithm_Variables Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application Curves
        1. 9.2.1.1 Motor startup
        2. 9.2.1.2 MPET
        3. 9.2.1.3 Dead time compensation
        4. 9.2.1.4 Auto handoff
        5. 9.2.1.5 Anti voltage surge (AVS)
        6. 9.2.1.6 Real time variable tracking using DACOUT
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Bulk Capacitance
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
      3. 9.4.3 Thermal Considerations
        1. 9.4.3.1 Power Dissipation
  11. 10Device and Documentation Support
    1. 10.1 Support Resources
    2. 10.2 Trademarks
    3. 10.3 Electrostatic Discharge Caution
    4. 10.4 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.4 Algorithm_Control Registers

Table 8-14 lists the memory-mapped registers for the Algorithm_Control registers. All register offset addresses not listed in Table 8-14 should be considered as reserved locations and the register contents should not be modified.

Table 8-14 ALGORITHM_CONTROL Registers
OffsetAcronymRegister NameSection
EChALGO_DEBUG1Algorithm Control RegisterSection 8.4.1
EEhALGO_DEBUG2Algorithm Control RegisterSection 8.4.2
F0hCURRENT_PICurrent PI Controller usedSection 8.4.3
F2hSPEED_PISpeed PI controller usedSection 8.4.4
F4hDAC_1DAC1 Control RegisterSection 8.4.5
F6hDAC_2DAC2 Control RegisterSection 8.4.6
F8hEEPROM_SECURITYEEPROM Security Control RegisterSection 8.4.7

Complex bit access types are encoded to fit into small table cells. Table 8-15 shows the codes that are used for access types in this section.

Table 8-15 Algorithm_Control Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Write Type
WWWrite
Reset or Default Value
-nValue after reset or the default value

8.4.1 ALGO_DEBUG1 Register (Offset = ECh) [Reset = 00000000h]

ALGO_DEBUG1 is shown in Figure 8-8 and described in Table 8-16.

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Algorithm control register for debug

Figure 8-8 ALGO_DEBUG1 Register
3130292827262524
OVERRIDEDIGITAL_SPEED_CTRL
R/W-0hR/W-0h
2322212019181716
DIGITAL_SPEED_CTRL
R/W-0h
15141312111098
CLOSED_LOOP_DISFORCE_ALIGN_ENFORCE_SLOW_FIRST_CYCLE_ENFORCE_IPD_ENFORCE_ISD_ENFORCE_ALIGN_ANGLE_SRC_SELRESERVED
R/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR/W-0hR-0h
76543210
RESERVED
R-0h
Table 8-16 ALGO_DEBUG1 Register Field Descriptions
BitFieldTypeResetDescription
31OVERRIDER/W0h Use to control the reference input mode. If OVERRIDE = 0x1, speed command can be written by the user through I2C interface irrespective of SPEED_MODE setting.
  • 0h = SPEED_CMD using Analog/PWM/Frequency mode
  • 1h = SPEED_CMD using DIGITAL_SPEED_CTRL
30-16DIGITAL_SPEED_CTRLR/W0h Reference input when OVERRIDE is set 0x1 or SPEED_MODE is set to 0x2. Reference input = (DIGITAL_SPEED_CTRL/32768 *100)%
15CLOSED_LOOP_DISR/W0h Use to disable closed loop operation
  • 0h = Enable closed Loop
  • 1h = Disable closed loop, motor commutation in open loop
14FORCE_ALIGN_ENR/W0h Enable force align state
  • 0h = Disable force align state
  • 1h = Enable force align state, device stays in align state if MTR_STARTUP is selected as ALIGN or DOUBLE ALIGN
13FORCE_SLOW_FIRST_CYCLE_ENR/W0h Enable force slow first cycle
  • 0h = Disable force slow first Cycle state
  • 1h = Enable force slow first cycle state, device stays in slow first cycle state if MTR_STARTUP is selected as SLOW FIRST CYCLE
12FORCE_IPD_ENR/W0h Enable force IPD
  • 0h = Disable force IPD state
  • 1h = Enable force IPD state, device stays in IPD state if MTR_STARTUP is selected as IPD
11FORCE_ISD_ENR/W0h Enable force ISD
  • 0h = Disable force ISD state
  • 1h = Enable force ISD state, device stays in ISD state if ISD_EN is set
10FORCE_ALIGN_ANGLE_SRC_SELR/W0h Select force align angle source
  • 0h = Force align angle defined by ALIGN_ANGLE
  • 1h = Force align angle defined by FORCED_ALIGN_ANGLE
9-0RESERVEDR0h Reserved

8.4.2 ALGO_DEBUG2 Register (Offset = EEh) [Reset = 00000000h]

ALGO_DEBUG2 is shown in Figure 8-9 and described in Table 8-17.

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Algorithm control register for debug

Figure 8-9 ALGO_DEBUG2 Register
3130292827262524
RESERVEDFORCE_RECIRCULATE_STOP_SECTORFORCE_RECIRCULATE_STOP_ENCURRENT_LOOP_DISFORCE_VD_CURRENT_LOOP_DIS
R-0hR/W-0hR/W-0hR/W-0hR/W-0h
2322212019181716
FORCE_VD_CURRENT_LOOP_DIS
R/W-0h
15141312111098
FORCE_VQ_CURRENT_LOOP_DIS
R/W-0h
76543210
FORCE_VQ_CURRENT_LOOP_DISMPET_CMDMPET_RMPET_LMPET_KEMPET_MECHMPET_WRITE_SHADOW
R/W-0hW-0hW-0hW-0hW-0hW-0hW-0h
Table 8-17 ALGO_DEBUG2 Register Field Descriptions
BitFieldTypeResetDescription
31RESERVEDR0h Reserved
30-28FORCE_RECIRCULATE_STOP_SECTORR/W0h Select the specific sector for recirculation stop if FORCE_RECIRCULATE_STOP_EN is set to 0x1
  • 0h = The last sector before stop condition
  • 1h = Sector1
  • 2h = Sector2
  • 3h = Sector3
  • 4h = Sector4
  • 5h = Sector5
  • 6h = Sector6
  • 7h = The last sector before stop condition
27FORCE_RECIRCULATE_STOP_ENR/W0h Enable force recirculate stop
  • 0h = Enable force recirculate stop
  • 1h = Disable force recirculate stop
26CURRENT_LOOP_DISR/W0h Use to control the FORCE_VD_CURRENT_LOOP_DIS and FORCE_VQ_CURRENT_LOOP_DIS. If CURRENT_LOOP_DIS = 0x1, Current loop and speed loop are disabled
  • 0h = Enable current loop
  • 1h = Disable current loop
25-16FORCE_VD_CURRENT_LOOP_DISR/W0h Sets Vd when current loop speed loop are disabled If CURRENT_LOOP_DIS = 0b1, then Vd is control using FORCE_VD_CURRENT_LOOP_DIS mdRef = (FORCE_VD_CURRENT_LOOP_DIS /500) if FORCE_VD_CURRENT_LOOP_DIS < 500 (FORCE_VD_CURRENT_LOOP_DIS - 1024)/500 if FORCE_VD_CURRENT_LOOP_DIS > 512 Valid values: 0 to 500 and 512 to 1000
15-6FORCE_VQ_CURRENT_LOOP_DISR/W0h Sets Vq when current loop speed loop are disabled If CURRENT_LOOP_DIS = 0b1, then Vq is control using FORCE_VQ_CURRENT_LOOP_DIS mqRef = (FORCE_VQ_CURRENT_LOOP_DIS /500) if FORCE_VQ_CURRENT_LOOP_DIS < 500 (FORCE_VQ_CURRENT_LOOP_DIS - 1024)/500 if FORCE_VQ_CURRENT_LOOP_DIS > 512 Valid values: 0 to 500 and 512 to 1000
5MPET_CMDW0h Initiates motor parameter measurement (MPET) routine when set to 0x1
4MPET_RW0h Enables motor resistance measurement during motor parameter measurement routine
  • 0h = Disables Motor Resistance measurement during motor parameter measurement routine
  • 1h = Enable Motor Resistance measurement during motor parameter measurement routine
3MPET_LW0h Enables motor inductance measurement during motor parameter measurement routine
  • 0h = Disables Motor Inductance measurement during motor parameter measurement routine
  • 1h = Enable Motor Inductance measurement during motor parameter measurement routine
2MPET_KEW0h Enables motor BEMF constant measurement during motor parameter measurement routine
  • 0h = Disables Motor BEMF constant measurement during motor parameter measurement routine
  • 1h = Enable Motor BEMF constant measurement during motor parameter measurement routine
1MPET_MECHW0h Enables motor mechanical parameter measurement during motor parameter measurement routine
  • 0h = Disables Motor mechanical parameter measurement during motor parameter measurement routine
  • 1h = Enable Motor mechanical parameter measurement during motor parameter measurement routine
0MPET_WRITE_SHADOWW0h Write measured parameters to shadow register when set to 0x1

8.4.3 CURRENT_PI Register (Offset = F0h) [Reset = 00000000h]

CURRENT_PI is shown in Figure 8-10 and described in Table 8-18.

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Current PI controller used

Figure 8-10 CURRENT_PI Register
313029282726252423222120191817161514131211109876543210
CURRENT_LOOP_KICURRENT_LOOP_KP
R-0hR-0h
Table 8-18 CURRENT_PI Register Field Descriptions
BitFieldTypeResetDescription
31-16CURRENT_LOOP_KIR0h 10 bit value for current loop Ki Same Scaling as CURR_LOOP_KI
15-0CURRENT_LOOP_KPR0h 10 bit value for current loop Kp Same Scaling as CURR_LOOP_KP

8.4.4 SPEED_PI Register (Offset = F2h) [Reset = 00000000h]

SPEED_PI is shown in Figure 8-11 and described in Table 8-19.

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Speed PI controller used

Figure 8-11 SPEED_PI Register
313029282726252423222120191817161514131211109876543210
SPEED_LOOP_KISPEED_LOOP_KP
R-0hR-0h
Table 8-19 SPEED_PI Register Field Descriptions
BitFieldTypeResetDescription
31-16SPEED_LOOP_KIR0h 10 bit value for Speed loop Ki Same Scaling as SPD_LOOP_KI
15-0SPEED_LOOP_KPR0h 10 bit value for Speed loop Kp Same Scaling as SPD_LOOP_KP

8.4.5 DAC_1 Register (Offset = F4h) [Reset = 00110000h]

DAC_1 is shown in Figure 8-12 and described in Table 8-20.

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DAC1 Control Register

Figure 8-12 DAC_1 Register
3130292827262524
RESERVED
R-0h
2322212019181716
RESERVEDDACOUT1_ENUM_SCALINGDACOUT1_SCALING
R-0hR/W-8hR/W-8h
15141312111098
DACOUT1_SCALINGDACOUT1_UNIPOLARDACOUT1_VAR_ADDR
R/W-8hR/W-0hR/W-0h
76543210
DACOUT1_VAR_ADDR
R/W-0h
Table 8-20 DAC_1 Register Field Descriptions
BitFieldTypeResetDescription
31-21RESERVEDR0h Reserved
20-17DACOUT1_ENUM_SCALINGR/W8h Multiplication Factor for DACOUT1 Algorithm Variable extracted from the address contained in DACOUT1_VAR_ADDR multiplied with 2DACOUT1_ENUM_SCALING. DACOUT1_ENUM_SCALING comes into effect only if DACOUT1_SCALING is 0x0
16-13DACOUT1_SCALINGR/W8h Scaling factor for DACOUT1 Algorithm Variable extracted from the address contained in DACOUT1_VAR_ADDR scaled with DACOUT1_SCALING. Actual voltage depends on DACOUT1_UNIPOLAR. If DACOUT1_UNIPOLAR = 0x1, Actual Value= ((DAC Voltage*Base Value) )/((3* DACOUT1_SCALING)) If DACOUT1_UNIPOLAR = 0x0, Actual Value= (((DAC Voltage-1.5)*Base Value) )/((1.5* DACOUT1_SCALING)) Base Current is 10/8 A, Base Speed is MAX_SPEED in Hz, Base Voltage for DC Bus Voltage is 60V, Base voltage for phase voltages is 60V/Sqrt(3) Note: For currents recommended DACOUT1_SCALING is 2/8, for Voltages 8/8 and for Speed 7/8
  • 0h = Treated s Enum with max value being 31
  • 1h = 1 / 8
  • 2h = 2 / 8
  • 3h = 3 / 8
  • 4h = 4 / 8
  • 5h = 5 / 8
  • 6h = 6 / 8
  • 7h = 7 / 8
  • 8h = 8 / 8
  • 9h = 9 / 8
  • Ah = 10 / 8
  • Bh = 11 / 8
  • Ch = 12 / 8
  • Dh = 13 / 8
  • Eh = 14 / 8
  • Fh = 15 / 8
12DACOUT1_UNIPOLARR/W0h Configures output of DACOUT1 If DACOUT1_UNIPOLAR = 0x1, Actual Value= ((DAC1 Voltage*Base Value) )/((3* DACOUT1_SCALING)) If DACOUT1_UNIPOLAR = 0x0, Actual Value= (((DAC2 Voltage-1.5)*Base Value) )/((1.5* DACOUT1_SCALING)) Base Current is 10/8 A, Base Speed is MAX_SPEED in Hz, Base Voltage for DC Bus Voltage is 60V, Base voltage for phase voltages is 60V/Sqrt(3)
  • 0h = Bipolar (Offset of 1.5 V)
  • 1h = Unipolar (No Offset)
11-0DACOUT1_VAR_ADDRR/W0h 12-bit address of variable to be monitored on DACOUT1

8.4.6 DAC_2 Register (Offset = F6h) [Reset = 00XX0000h]

DAC_2 is shown in Figure 8-13 and described in Table 8-21.

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DAC2 Control Register

Figure 8-13 DAC_2 Register
3130292827262524
RESERVED
R-0h
2322212019181716
RESERVEDDACOUT2_ENUM_SCALINGDACOUT2_SCALING
R-0hR/W-XhR/W-8h
15141312111098
DACOUT2_SCALINGDACOUT2_UNIPOLARDACOUT2_VAR_ADDR
R/W-8hR/W-0hR/W-0h
76543210
DACOUT2_VAR_ADDR
R/W-0h
Table 8-21 DAC_2 Register Field Descriptions
BitFieldTypeResetDescription
31-23RESERVEDR0h Reserved
22-19DACOUT2_ENUM_SCALINGR/WXh Multiplication Factor for DACOUT2 Algorithm Variable extracted from the address contained in DACOUT2_VAR_ADDR multiplied with 2DACOUT2_ENUM_SCALING. DACOUT2_ENUM_SCALING comes into effect only if DACOUT2_SCALING is 0x0
18-15DACOUT2_SCALINGR/W8h Scaling factor for DACOUT2 Algorithm Variable extracted from the address contained in DACOUT2_VAR_ADDR scaled with DACOUT2_SCALING . Actual voltage depends on DACOUT2_UNIPOLAR. If DACOUT2_UNIPOLAR = 0x1, Actual Value= ((DAC2 Voltage*Base Value) )/((3* DACOUT2_SCALING)) If DACOUT2_UNIPOLAR = 0x0, Actual Value= (((DAC2 Voltage-1.5)*Base Value) )/((1.5* DACOUT2_SCALING)) Base Current is 10/8 A, Base Speed is MAX_SPEED in Hz, Base Voltage for DC Bus Voltage is 60V, Base voltage for phase voltages is 60V/Sqrt(3) Note: For currents recommended DACOUT1_SCALING is 2/8, for Voltages 8/8 and for Speed information 7/8
  • 0h = Treated s Enum with max value being 31
  • 1h = 1 / 8
  • 2h = 2 / 8
  • 3h = 3 / 8
  • 4h = 4 / 8
  • 5h = 5 / 8
  • 6h = 6 / 8
  • 7h = 7 / 8
  • 8h = 8 / 8
  • 9h = 9 / 8
  • Ah = 10 / 8
  • Bh = 11 / 8
  • Ch = 12 / 8
  • Dh = 13 / 8
  • Eh = 14 / 8
  • Fh = 15 / 8
14DACOUT2_UNIPOLARR/W0h Configures output of DACOUT2 If DACOUT2_UNIPOLAR = 0x1, Actual Value= ((DAC2 Voltage*Base Value) )/((3* DACOUT2_SCALING)) If DACOUT2_UNIPOLAR = 0x0, Actual Value= (((DAC2 Voltage-1.5)*Base Value) )/((1.5* DACOUT2_SCALING)) Base Current is 10/8 A, Base Speed is MAX_SPEED in Hz, Base Voltage for DC Bus Voltage is 60V, Base voltage for phase voltages is 60V/Sqrt(3) Note: For currents recommended DACOUT1_SCALING is 2/8, for Voltages 8/8 and for Speed information 7/8
  • 0h = Bipolar (Offset of 1.5 V)
  • 1h = Unipolar (No Offset)
13-0DACOUT2_VAR_ADDRR/W0h 14-bit address of variable to be monitored on DACOUT2

8.4.7 EEPROM_SECURITY Register (Offset = F8h) [Reset = 0000h]

EEPROM_SECURITY is shown in Figure 8-14 and described in Table 8-22.

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EEPROM Security Control Register

Figure 8-14 EEPROM_SECURITY Register
15141312111098
RESERVEDUSER_EEPROM_KEY
R-0hR/W-0h
76543210
USER_EEPROM_KEY
R/W-0h
Table 8-22 EEPROM_SECURITY Register Field Descriptions
BitFieldTypeResetDescription
15RESERVEDR0h Reserved
14-0USER_EEPROM_KEYR/W0h User input key to unlock EEPROM for read/writes. Value in EEPROM_LOCK_KEY should be written here for unlocking EEPROM when EEPROM_LOCK_MODE = 0x1, 0x2