SLVSLZ3 August   2026 TLV612901

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Setting
      2. 7.3.2 Switching Frequency and Spread Spectrum Function
    4. 7.4 Device Functional Modes
      1. 7.4.1  Enable and Start-Up
      2. 7.4.2  Operation Mode Setting
      3. 7.4.3  Bypass Mode
      4. 7.4.4  Boost Control Operation
      5. 7.4.5  Auto PFM Mode
      6. 7.4.6  Forced PWM Mode
      7. 7.4.7  Ultrasonic Mode
      8. 7.4.8  Output Discharge
      9. 7.4.9  Undervoltage Lockout
      10. 7.4.10 Current Limit Operation
      11. 7.4.11 Output Short-to-Ground Protection
      12. 7.4.12 Overvoltage Protection
      13. 7.4.13 Thermal Shutdown
      14. 7.4.14 Power-Good Indication Status
    5. 7.5 Programming
      1. 7.5.1 Data Validity
      2. 7.5.2 START and STOP Conditions
      3. 7.5.3 Byte Format
      4. 7.5.4 Acknowledge (ACK) and Not Acknowledge (NACK)
      5. 7.5.5 Target Address and Data Direction Bit
      6. 7.5.6 Single Read and Write
      7. 7.5.7 Multi-Read and Multi-Write
  9. 8 Register Maps
    1. 8.1 DeviceID Register
    2. 8.2 CONFIG Register
    3. 8.3 VOUTFLOORSET Register
    4. 8.4 ILIMBSTSET Register
    5. 8.5 VOUTROOFSET Register
    6. 8.6 STATUS Register
    7. 8.7 ILIMPTSET Register
    8. 8.8 BSTLOOP Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 TLV612901 With 2.5V – 4.85V VIN, 5.0V VOUT, 3A Output Current
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Output Capacitor
          3. 9.2.1.2.3 Input Capacitor
          4. 9.2.1.2.4 Checking Loop Stability
        3. 9.2.1.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
      3. 9.4.3 Thermal Information
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1.     79

8 Register Maps

The Configuration Memory Map lists the memory-mapped registers for the device registers. All register offset addresses not listed in The Configuration Memory Map should be considered as reserved locations, and the register contents should not be modified.

Table 8-1 Device Registers
Register
Address		Register NameDescription
00hDeviceID RegisterSets Manufacturer ID & Device version ID
01hCONFIG RegisterSets miscellaneous configuration bits
02hVOUTFLOORSET RegisterSets the floor output voltage threshold boost / bypass mode change

03h

ILIMBSTSET RegisterSets the input current limit in dc/dc boost mode
04hVOUTROOFSET Register

Sets the roof output voltage threshold boost / bypass mode change

(only valid when GPIO is configured as VSEL function)

05hSTATUS RegisterReturns status flags
06hILIMPTSET RegisterSets the input current limit in bypass mode

07h

BSTLOOP Register

Sets the internal compensation loop