SLVUD68B March   2025  – October 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Connection Descriptions
      1. 2.1.1 Connections and Test Points
      2. 2.1.2 Jumper Configurations
  8. 3Implementation Results
    1. 3.1 Variable Resistor for CS and CL
      1. 3.1.1 Current Sense Resistor
      2. 3.1.2 Adjustable Current Limit
  9. 4Hardware Design Files
    1. 4.1 HCXX-BASE-EVM and 2HC08-MOD-EVM Schematic
    2. 4.2 HCXX-BASE-EVM and 2HC08-MOD-EVM Assembly Drawings and Layout
    3. 4.3 Bill of Materials (BOM)
  10. 5Additional Information
    1. 5.1 Trademarks
  11. 6Revision History

2.1.1 Connections and Test Points

Connector and Test Point Description
T1, TP5 Supply voltage VBB
T2, TP1 Output voltage OUT1
T3, TP8 Output voltage OUT2
T4 OUT1 GND
T5 OUT2 GND
TP15, TP16 System GND
TP18 GND_IC test point
TP2, TP3 ENABLE test points EN1 and EN2
TP7 ILIM test point
TP6 SEL test point
TP4 DIAG_EN test point
TP9, TP10 FLT test point and FLT_IC test point
TP11, TP12 SNS test point and SNS_IC test point
TP14 LDO voltage input (VBB)
TP19 LDO voltage output (+5V)