SLVUDA3 July   2025 MSPM0G3507

 

  1.   1
  2.   Description
  3.   Features
  4. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  5. 2Hardware
    1. 2.1 Hardware Features
      1. 2.1.1 MSPM0G3507 MCU
      2. 2.1.2 Application (or Backchannel) UART
      3. 2.1.3 Using an External Debug Probe
    2. 2.2 Power
    3. 2.3 Clocking
    4. 2.4 Pinout
  6. 3Hardware Design Files
    1. 3.1 Hardware Design Files
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  7. 4Software Examples
  8. 5Resources
    1. 5.1 Integrated Development Environments
      1. 5.1.1 TI Cloud Development Tools
      2. 5.1.2 TI Resource Explorer Cloud
      3. 5.1.3 Code Composer Studio Cloud
      4. 5.1.4 Code Composer Studio IDE
    2. 5.2 MSPM0 SDK and TI Resource Explorer
    3. 5.3 Community Resources
      1. 5.3.1 TI E2E Forums
  9. 6Additional Information
    1. 6.1 Trademarks
  10. 7Revision History

2.3 Clocking

The internal SYSOSC is 32MHz as default at the accuracy of 2.5%. To achieve higher accuracy, a 0.1% 100kΩ resistor is connected to the ROSC pin, PA2. If higher accuracy is not needed, then resistor R9 can be depopulated, and pin PA2 used for the other functions. The MCLK is sourced by 32MHz SYSOSC at default. CPUCLK is sourced directly from MCLK and MCLK can be configured up to 80MHz by enable SYSPLL. The low-power clock (ULPCLK) can be sourced by MCLK and used as clock source for PD0 peripherals. For more clock tree details see Section 2.3 Clock Module (CKM) of the MSPM0 G-Series 80MHz Microcontrollers Technical Reference Manual.