SLVUDD5 July   2025 DAC39RF20

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents (Required Equipment)
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Setup Procedure
      1. 2.1.1  Installing the DAC39RF20EVM Configuration GUI Software
        1. 2.1.1.1 Installing and Setting Up Vivado™ Lab Tools
      2. 2.1.2  Connect the DAC39RF20EVM and TSW14J59EVM
      3. 2.1.3  Connect the Power Supplies to the Boards (Power Off)
      4. 2.1.4  Connect the Spectrum Analyzer to the EVM
      5. 2.1.5  Turn On the TSW14J59EVM Power and Connect to the PC
      6. 2.1.6  Turn On the DAC39RF20EVM Power Supplies and Connect to the PC
      7. 2.1.7  Turn On the Signal Generators
      8. 2.1.8  Launching the DAC39RF20EVM GUI and Programming the DAC EVM - JMODE 0 (Bypass Mode)
      9. 2.1.9  Launching the DAC39RF20EVM GUI and Programming the DAC EVM - JMODE 1 (DUC Mode)
      10. 2.1.10 Configuration Example of DAC39RF20EVM in DDS Mode
    2. 2.2 Evaluation Board Details: Analog Outputs
    3. 2.3 FMC Signal Routing
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 Trademarks

1.3 Specification

DAC39RF20EVM DAC39RF20EVM Key Components - Top View and Bottom View Figure 1-1 DAC39RF20EVM Key Components - Top View and Bottom View

The DAC39RF20EVM is paired with the TSW14J59EVM data capture and pattern generator card. If the DAC39RF20EVM is only used in DDS mode, then data capture EVM is not required.

To improve signal routing quality, serial lane polarity is inverted with respect to the standard FMC VITA-57 signal mapping. Signal mapping and polarity is shown in Section 2.3).