SLVUDD5
July 2025
DAC39RF20
1
Description
Features
4
1
Evaluation Module Overview
1.1
Introduction
1.2
Kit Contents (Required Equipment)
1.3
Specification
1.4
Device Information
2
Hardware
2.1
Setup Procedure
2.1.1
Installing the DAC39RF20EVM Configuration GUI Software
2.1.1.1
Installing and Setting Up Vivado™ Lab Tools
2.1.2
Connect the DAC39RF20EVM and TSW14J59EVM
2.1.3
Connect the Power Supplies to the Boards (Power Off)
2.1.4
Connect the Spectrum Analyzer to the EVM
2.1.5
Turn On the TSW14J59EVM Power and Connect to the PC
2.1.6
Turn On the DAC39RF20EVM Power Supplies and Connect to the PC
2.1.7
Turn On the Signal Generators
2.1.8
Launching the DAC39RF20EVM GUI and Programming the DAC EVM - JMODE 0 (Bypass Mode)
2.1.9
Launching the DAC39RF20EVM GUI and Programming the DAC EVM - JMODE 1 (DUC Mode)
2.1.10
Configuration Example of DAC39RF20EVM in DDS Mode
2.2
Evaluation Board Details: Analog Outputs
2.3
FMC Signal Routing
3
Hardware Design Files
4
Additional Information
4.1
Trademarks
Features
Two balun-coupled output networks per DAC output allowing singled ended signal evaluation
A 5MHz to 10GHz low band balun for first Nyquist evaluation
A 2GHz to 18GHz high band balun for second and third Nyquist evaluation
A LMK04828 clock distribution chip for distributing FPGA reference clocks and SYSREF for subclass 1 operation
A balun-coupled clock input network to test the DAC performance with an external low-noise clock source
An FMC+ with high-speed serial data connections for full JESD204C testing of all 16 lanes
A USB to serial chip to allow programming of the DAC or LMK with a simple USB connection
The ability to program the DAC or LMK from an FPGA using the FMC+ connector
Device register programming through USB connector and FTDI USB-to-SPI bus translator with option to program from FGPA using SPI through FMC+ connector