SLYT863 April   2025 LM5066I

 

  1.   1
  2. 1 Introduction
  3. 2 3
  4. 3 Challenges in designing a hot-swap circuit for a 48V AI server
  5. 4 Challenge No. 1: Turnoff delay during an output short-circuit
  6. 5 Challenge No. 2: False gate turn-off during a load transient
  7. 6 Challenge No. 3: Parallel resonance during controlled (slow) turn-on
  8. 7 Proposed circuit enhancements
  9. 8 Improving the turn-off response
  10. 9 Overcoming false turn-off for dynamic loads
  11. 10Damping parasitic oscillations
  12. 11Design guidelines and component selection
  13. 12Cdv/dt discharge circuit
  14. 13Conclusion
  15. 14References
  16. 15Related Websites

6 Challenge No. 3: Parallel resonance during controlled (slow) turn-on

Generally, parallel MOSFETs are more prone to parasitic oscillations than a single MOSFET in the linear region of operation. This is because of the presence of parasitic stray package inductances and capacitances on the drain, source and gate nodes, which form a resonant tank circuit resembling a Colpitts oscillator. Unlike switching regulators with a gate-drive strength of >2A, hot-swap controllers with a lower gate-drive strength (20µA) limit the inrush current during start-up by operating the MOSFETs in the linear region. As a result, the parallel combination of hot-swap MOSFETs is highly susceptible, with more chance of generating sustained oscillations. This phenomenon causes the violation of the MOSFET SOA during a power-into-short fault, leading to MOSFET damage.