SLYT863 April   2025 LM5066I

 

  1.   1
  2. 1 Introduction
  3. 2 3
  4. 3 Challenges in designing a hot-swap circuit for a 48V AI server
  5. 4 Challenge No. 1: Turnoff delay during an output short-circuit
  6. 5 Challenge No. 2: False gate turn-off during a load transient
  7. 6 Challenge No. 3: Parallel resonance during controlled (slow) turn-on
  8. 7 Proposed circuit enhancements
  9. 8 Improving the turn-off response
  10. 9 Overcoming false turn-off for dynamic loads
  11. 10Damping parasitic oscillations
  12. 11Design guidelines and component selection
  13. 12Cdv/dt discharge circuit
  14. 13Conclusion
  15. 14References
  16. 15Related Websites

11 Design guidelines and component selection

Reference [1] iterates a procedure for designing a hot-swap circuit to protect the system and MOSFETs. We recommend reviewing Reference [1] to become familiar with the design.

Feeding the system specifications shown in Table 1 into the LM5066I design calculator will obtain the values of the current-sense resistor (RSNS), power-limiting resistor (RPWR), fault timer capacitor (CTIMER), soft-start capacitor (Cdv/dt) and number (N) of selected MOSFETs to parallel. In the 8kW Hot-Swap Reference Design for 48V Artificial Intelligence Servers [2], RSNS = 330µΩ, RPWR = 28.7kΩ, CTIMER = 10nF, Cdv/dt = 47nF and N = 8.

Looking at Figure 8, select the RPD resistor using Equation 1:

Equation 1. R P D > V B E s a t I G A T E C B

where, VBE(sat) is the base-emitter saturation voltage of the QPD PNP transistor and IGATE(CB) is the power-on reset circuit-breaker sink current in the LM5066I hot-swap controller. The 8kW hot-swap reference design uses an RPD value = 20Ω.