SLYT863 April   2025 LM5066I

 

  1.   1
  2. 1 Introduction
  3. 2 3
  4. 3 Challenges in designing a hot-swap circuit for a 48V AI server
  5. 4 Challenge No. 1: Turnoff delay during an output short-circuit
  6. 5 Challenge No. 2: False gate turn-off during a load transient
  7. 6 Challenge No. 3: Parallel resonance during controlled (slow) turn-on
  8. 7 Proposed circuit enhancements
  9. 8 Improving the turn-off response
  10. 9 Overcoming false turn-off for dynamic loads
  11. 10Damping parasitic oscillations
  12. 11Design guidelines and component selection
  13. 12Cdv/dt discharge circuit
  14. 13Conclusion
  15. 14References
  16. 15Related Websites

5 Challenge No. 2: False gate turn-off during a load transient

Although the local PNP-based discharge circuit for Cdv/dt helps reliably turn-off the MOSFETs during an output short-circuit event, it causes a false GATE turn-off in the presence of high-frequency, high slew-rate load transients. During load step-up, the MOSFET source node drops because of the finite input and output impedances of the hot-swap circuit. The voltage drop at the source node gets coupled to the MOSFET gate node through the CGS capacitance of the MOSFET and causes the gate node to drop as well. The MOSFET source node recovers during load step-down. The gate node cannot recover completely to its previous level, because of the limited gate current (20µA typical) of the LM5066I hot-swap controller. As a result, the hot-swap controller gate continues to drop further in the subsequent load transient cycles developing the base-emitter voltage for Q1. Finally, PNP bipolar junction transistor Q1 turns on, and falsely shuts down the system. Figure 6 illustrates the whole process, while Figure 7 shows the corresponding test result.

Illustration of a hot-swap circuit for a dynamic load. Figure 6 Illustration of a hot-swap circuit for a dynamic load.
Response of a hot-swap circuit to a dynamic load. Figure 7 Response of a hot-swap circuit to a dynamic load.