SNAA408 April   2025 LMK3H0102

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Output Recommendations
    1. 2.1 Differential vs. Single-Ended
    2. 2.2 Slew Rate
    3. 2.3 Spread Spectrum Clocking
  6. 3PCB Design
    1. 3.1 Stackup
    2. 3.2 Power Filtering
    3. 3.3 Avoid Bottlenecking
    4. 3.4 Strategic Via Placements
      1. 3.4.1 Distributing Power Concentrations
        1. 3.4.1.1 Via Sizes
        2. 3.4.1.2 Pads and Pours
      2. 3.4.2 Shielding and Stitching Vias
  7. 4Minimize Possible Antennas
    1. 4.1 Stubs
    2. 4.2 Net Pours
  8. 5Summary
  9. 6References

3.3 Avoid Bottlenecking

As stated in the prior section, the power and ground planes can be a powerful source of EMI radiation. A common mistake in PCB design is creating bottlenecks in the power and ground traces. Bottlenecking occurs when a large concentration of power is forced into a smaller area.

In the following images, the red colored arrows represent a higher concentration of power, while the green colored arrows represent a lower concentration.

In Figure 3-4, the VDD trace shifts to a narrower trace. Where the two connect is the bottleneck. That area is heavily concentrated with current and can act as an antenna for EMI, shown with the red colored arrows.


Narrow Power Trace

Figure 3-4 Narrow Power Trace

In the new layout (Figure 3-5), the entire plane is utilized, rather than a single trace, decreasing the power concentration at any given point, shown by the green arrows.


Wider Power Trace

Figure 3-5 Wider Power Trace