SNAA408 April   2025 LMK3H0102

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Output Recommendations
    1. 2.1 Differential vs. Single-Ended
    2. 2.2 Slew Rate
    3. 2.3 Spread Spectrum Clocking
  6. 3PCB Design
    1. 3.1 Stackup
    2. 3.2 Power Filtering
    3. 3.3 Avoid Bottlenecking
    4. 3.4 Strategic Via Placements
      1. 3.4.1 Distributing Power Concentrations
        1. 3.4.1.1 Via Sizes
        2. 3.4.1.2 Pads and Pours
      2. 3.4.2 Shielding and Stitching Vias
  7. 4Minimize Possible Antennas
    1. 4.1 Stubs
    2. 4.2 Net Pours
  8. 5Summary
  9. 6References

1 Introduction

When designing a PCB layout for EMI sensitive applications, a good practice is to implement an initial design optimized for best EMI performance. This application note discusses these layout strategies as well as how to fully utilize clocking device features to achieve the best EMI performance.