SNAS787C November   2019  – August 2025 CDCDB2000

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable Control
      2. 6.3.2 SMBus
        1. 6.3.2.1 SMBus Address Assignment
      3. 6.3.3 Side-Band Interface
    4. 6.4 Device Functional Modes
      1. 6.4.1 CKPWRGD_PD# Function
      2. 6.4.2 OE[12:5]# and SMBus Output Enables
    5. 6.5 Programming
      1. 6.5.1 SMBus
      2. 6.5.2 SBI
  8. 7 Register Maps
    1. 7.1 CDCDB2000 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Enable Control Method
        2. 8.2.2.2 SMBus Address
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 TICS Pro
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.5.2 SBI

Side-Band Interface (SBI) is a simple 3-wire serial interface. This interface consists of DATA, CLK and SHFT_LD# pins. When the SHFT_LD# pin is high, the rising edge of CLK clocks DATA into a shift register. After shifting data, the falling edge of SHFT_LD# loads the shift register contents into the Output Register. Both the SBI and the traditional SMBus interface feed common output enable or disable synchronization logic, which provides glitch-free enable and disable outputs regardless of the method used.

SBI can be configured at a system level in three ways: star topology, daisy chain topology, and directly. The star topology is shown in Figure 6-3. The daisy chain topology is shown in Figure 6-4.

CDCDB2000 SBI Star Topology Figure 6-3 SBI Star Topology
CDCDB2000 SBI Daisy Chain Topology Figure 6-4 SBI Daisy Chain Topology