SNAS847E November   2023  – October 2025 LMK3H0102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Interface Specification
  7. 6 Parameter Measurement Information
    1. 6.1 Output Format Configurations
    2. 6.2 Differential Voltage Measurement Terminology
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Block-Level Description
      2. 7.3.2 Device Configuration Control
      3. 7.3.3 OTP Mode
      4. 7.3.4 I2C Mode
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fail-Safe Inputs
      2. 7.4.2 Fractional Output Dividers
        1. 7.4.2.1 FOD Operation
        2. 7.4.2.2 Edge Combiner
        3. 7.4.2.3 Digital State Machine
        4. 7.4.2.4 Spread-Spectrum Clocking
        5. 7.4.2.5 Integer Boundary Spurs
      3. 7.4.3 Output Behavior
        1. 7.4.3.1 Output Format Selection
          1. 7.4.3.1.1 Output Format Types
            1. 7.4.3.1.1.1 LP-HCSL Termination
        2. 7.4.3.2 Output Slew Rate Control
        3. 7.4.3.3 REF_CTRL Operation
      4. 7.4.4 Output Enable
        1. 7.4.4.1 Output Enable Control
        2. 7.4.4.2 Output Enable Polarity
        3. 7.4.4.3 Individual Output Enable
        4. 7.4.4.4 Output Disable Behavior
      5. 7.4.5 Device Default Settings
    5. 7.5 Programming
      1. 7.5.1 I2C Serial Interface
      2. 7.5.2 One-Time Programming Sequence
  9. 8 Device Registers
    1. 8.1 Register Maps
      1. 8.1.1  R0 Register (Address = 0x0) [reset = 0x0861/0x0863]
      2. 8.1.2  R1 Register (Address = 0x1) [reset = 0x5599]
      3. 8.1.3  R2 Register (Address = 0x2) [reset = 0xC28F]
      4. 8.1.4  R3 Register (Address = 0x3) [reset = 0x1801]
      5. 8.1.5  R4 Register (Address = 0x4) [reset = 0x0000]
      6. 8.1.6  R5 Register (Address = 0x5) [reset = 0x0000]
      7. 8.1.7  R6 Register (Address = 0x6) [reset = 0x0AA0]
      8. 8.1.8  R7 Register (Address = 0x7) [reset = 0x6503]
      9. 8.1.9  R8 Register (Address = 0x8) [reset = 0xC28F]
      10. 8.1.10 R9 Register (Address = 0x9) [reset = 0x3166]
      11. 8.1.11 R10 Register (Address = 0xA) [reset = 0x0010]
      12. 8.1.12 R11 Register (Address = 0xB) [reset = 0x0000]
      13. 8.1.13 R12 Register (Address = 0xC) [reset = 0xE800]
      14. 8.1.14 R146 Register (Address = 0x92) [reset = 0x0000]
      15. 8.1.15 R147 Register (Address = 0x93) [reset = 0x0000]
      16. 8.1.16 R148 Register (Address = 0x94) [reset = 0x0000]
      17. 8.1.17 R238 Register (Address = 0xEE) [reset = 0x0000]
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Application Block Diagram Examples
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Example: Changing Output Frequency
      5. 9.2.5 Crosstalk
      6. 9.2.6 Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Power-Up Sequencing
      2. 9.3.2 Decoupling Power Supply Inputs
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

11 Revision History

Changes from Revision D (March 2025) to Revision E (October 2025)

Changes from Revision C (October 2024) to Revision D (March 2025)

  • Added PCIe Gen 7 Go
  • Updated PCIe Gen 6 to PCIe Gen 7Go
  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added reference to LMK3H0102 Configuration GuideGo
  • Updated PCIe compliance to Gen 7 throughout the documentGo
  • Added margin to the following specifications: LP-HCSL high level for 2.5V/3.3V from +/-5% to +/-10%, LP-HCSL duty cycle from 49.9% - 50.3% for 100MHz / 48.8% - 50.8% for f ≤ 325MHz / 48.6% - 51.8% for 325MHz < f ≤ 400MHz to 47% - 53% for all cases, LVDS duty cycle from 49% - 51.1% to 47% - 53%, LVDS 20% to 80% differential rise/fall time maximum increased by 5%, PSNR maximum limits increased by 5%. No SSC cycle-to-cycle maximum jitter reduced from 150ps to 20ps. Updated PADCAP_x to OUTx_SLEW_RATE for LVDS rise/fall time.Go
  • Updated image for LP-HCSL configuration during PCIe Test to reflect correct device nameGo
  • Added reference to LMK3H0102 Configuration Guide, updated units to latest standards, added PCIe Gen 7 supportGo
  • Clarified behavior for switching OTP pages in OTP ModeGo
  • Added clarification on requesting OTP configurations from TIGo
  • Updated Programming Sequence image to reflect OTP_AUTOLOAD_DIS = 1 instead of OTP_AUTOLOAD_DIS = 0Go
  • Corrected description of ADC_CLK_N_DIV to show 0x99 instead of 0x9B.Go
  • Updated default value of OUT0_SLEW_RATE from 0x3 to 0x0. Updated reset value of R6 from 0x2AA0 to 0x0AA0Go
  • Updated default value of REF_CTRL_PIN_FUNC from 0x1 to 0x3. Updated default value of OUT0_EN from 0x0 to 0x1. Updated default value of OUT1_EN from 0x0 to 0x1.Go
  • Updated default value of OUT1_LPHSCL_AMP_SEL from 0x3 to 0x6. Removed extra period in the description of OUT_FMT_SRC_SEL. Added note that OTP_ID is 1 for the V18 configuration.Go
  • Updated default value of R12 from 0x6800 to 0xE800. Updated default value of I2C_ADDR_LSB_SEL from 0x0 to 0x1.Go
  • Updated instances of REF_CLK to REF_CTRL to align with pin names.Go
  • Changed REF_CLK frequency from 33MHz to 25MHz to match diagramGo
  • Updated instance of CHO_FOD_SEL to CH0_FOD_SEL. Updated REF_CLK to 25MHz in place of 33MHz for example calculation.Go
  • Changed "more far away" to "farther away"Go
  • Added reference to LMK3H0102 Configuration GuideGo

Changes from Revision B (June 2024) to Revision C (October 2024)

  • Changed data sheet status from Advanced Information to Production DataGo
  • Updated the number formatting for tables, figures, and cross-references throughout the documentGo

Changes from Revision A (December 2023) to Revision B (June 2024)

  • Updated the number formatting for tables, figures, and cross-references throughout the documentGo

Changes from Revision * (November 2023) to Revision A (December 2023)

  • Clarified preconfigured SSC options, fixed functional safety linkGo
  • Clarified pin behaviorGo
  • Updated the number formatting for tables, figures, and cross-references throughout the documentGo