SNAS927 August   2025 LMKDB1202 , LMKDB1204

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information 
    5. 6.5 Electrical Characteristics
    6. 6.6 SMBus Timing Requirements
    7. 6.7 SBI Timing Requirements
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Features
        1. 8.3.1.1 Running Input Clocks When Device is Powered Off
        2. 8.3.1.2 Fail-Safe Inputs
        3. 8.3.1.3 Input Configurations
          1. 8.3.1.3.1 Internal Termination for Clock Inputs
          2. 8.3.1.3.2 AC-Coupled or DC-Coupled Clock Inputs
      2. 8.3.2 Flexible Power Sequence
        1. 8.3.2.1 PWRDN# Assertion and Deassertion
        2. 8.3.2.2 OE# Assertion and Deassertion
        3. 8.3.2.3 Clock Input and PWRGD/PWRDN# Behaviors When Device Power is Off
      3. 8.3.3 LOS and OE
        1. 8.3.3.1 Synchronous OE
        2. 8.3.3.2 OE Control
          1. 8.3.3.2.1 OE Mapping
        3. 8.3.3.3 Automatic Output Disable
        4. 8.3.3.4 LOS Detection
      4. 8.3.4 Output Features
        1. 8.3.4.1 Output Banks
        2. 8.3.4.2 Double Termination
        3. 8.3.4.3 Programmable Output Slew Rate
          1. 8.3.4.3.1 Slew Rate Control Through SMBus
        4. 8.3.4.4 Programmable Output Swing
        5. 8.3.4.5 Accurate Output Impedance
        6. 8.3.4.6 Programmable Output Impedance
    4. 8.4 Device Functional Modes
      1. 8.4.1 SMBus Mode
      2. 8.4.2 SBI Mode
      3. 8.4.3 Pin Mode
  10. 9 Register Maps
    1. 9.1 LMKDB12xx Registers
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
8.3.3.2.1 OE Mapping

The LMKDB12xx have maximum of 8 OE# pins. Below table provides mapping for LMKDB1216 and LMKDB1208. Alternate pin function in the table for LMKDB1216 can be selected through OE#_ASSIGNMENT registers.

Table 8-2 LMKDB1216 and LMKDB1208 OE# Mapping
Pin Name SBI_EN Pin LMKDB1216 Default Pin Function LMKDB1216 Alternate Pin Function LMKDB1208 Default Pin Function LMKDB1208 Alternate Pin Function
OE0# X CLK0 OE# CLK1 OE# CLK0 OE# N/A
OE1# X CLK2 OE# CLK3 OE# CLK1 OE#
OE2# X CLK4 OE# CLK5 OE# CLK2 OE#
OE3#/SBI_CLK 0 (Inactive) CLK6 OE# CLK7 OE# CLK3 OE#
1 (Active) SBI_CLK N/A SBI_CLK
OE4#/SBI_IN 0 (Inactive) CLK8 OE# CLK9 OE# CLK4 OE#
1 (Active) SBI_IN N/A SBI_IN
OE5# X CLK10 OE# CLK11 OE# CLK5 OE#
OE6#/SHFT_LD# 0 (Inactive) CLK12 OE# CLK13 OE# CLK6 OE#
1 (Active) SHFT_LD# N/A SHFT_LD#
OE7#/SBI_OUT 0 (Inactive) CLK14 OE# CLK15 OE# CLK7 OE#
1 (Active) SBI_OUT N/A SBI_OUT