SNLU237B September   2018  – July 2025 DP83869HM

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
    5. 1.5 Quick Setup
      1. 1.5.1 Onboard Power Supply Operation
      2. 1.5.2 External Power Supply Operation
  6. 2Hardware
    1. 2.1 Board Setup Details
      1. 2.1.1 EVM High-Level Summary
    2. 2.2 Configuration Options
      1. 2.2.1 Bootstrap Options
        1. 2.2.1.1 Straps for PHY Address
        2. 2.2.1.2 Strap for DP83869 Functional Mode Selection
        3. 2.2.1.3 Straps for RGMII/SGMII to Copper
        4. 2.2.1.4 Straps for RGMII to 1000Base-X
        5. 2.2.1.5 Straps for RGMII to 100Base-FX
        6. 2.2.1.6 Straps for Bridge Mode (SGMII-RGMII)
        7. 2.2.1.7 Straps for 100 M Media Converter
        8. 2.2.1.8 Straps for 1000 M Media Convertor
      2. 2.2.2 SGMII/Fiber Interface
      3. 2.2.3 RGMII
      4. 2.2.4 Clock Output
      5. 2.2.5 Clock Input
      6. 2.2.6 Switch Configuration Options
  7. 3Software
    1. 3.1 MSP430 Driver
    2. 3.2 USB-2-MDIO Software
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 Layout
    3. 4.3 Bill of Materials
  9. 5Additional Information
    1. 5.1 Definitions
    2.     Trademarks
  10. 6Revision History

2.2.5 Clock Input

The EVM is configured for default crystal input clock operation. The EVM supports the option to provide clock from 25-MHz crystal, 25-MHz CMOS oscillator, and the External clock from the SMB connector. A 50-Ω Coax cable with a SMB connector needs to be used for providing clock input from external sources.

DP83869EVM Onboard ClockFigure 2-2 Onboard Clock
DP83869EVM External Clock InputFigure 2-3 External Clock Input