
LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-1 Efficiency vs Load Across VOUT at
VIN = 5V, 100kHz
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-3 Efficiency vs Load Across VOUT at
VIN = 5V, 500kHz
LOUT = 1µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-5 Efficiency vs Load Across VOUT at
VIN = 5V, 1MHz
LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-7 Efficiency vs Load Across
Temperature at 100kHz,
VIN = 5V, VOUT = 2.5V 
LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-9 Efficiency vs Load Across
Temperature at 100kHz,
VIN = 5V, VOUT = 1.1V
LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-11 Efficiency vs Load Across Temperature at 100kHz,
VIN = 12V, VOUT = 3.3V
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-13 Efficiency vs Load Across Temperature at 500kHz,
VIN = 5V, VOUT = 2.5V
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-15 Efficiency vs Load Across Temperature at 500kHz,
VIN = 5V, VOUT = 1.1V
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-17 Efficiency vs Load Across Temperature at 500kHz,
VIN = 12V, VOUT = 3.3V
LOUT = 1µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-19 Efficiency vs Load Across Temperature at 1MHz, VIN
= 5V, VOUT = 2.5V
LOUT = 1µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-21 Efficiency vs Load Across Temperature at 1MHz, VIN
= 12V, VOUT = 5V
LOUT = 3.3µH
Figure 7-23 Low
Current Efficiency vs Load Across Temperature at
500kHz, VIN = 12V,
VOUT = 5V
LOUT = 3.3µH
Figure 7-25 Low
Current Efficiency vs Load Across Temperature at
500kHz, VIN = 5V,
VOUT
= 1.8V
VEN = 0V
Figure 7-27 PVIN
Shutdown Current vs Temperature
VFAULT = 7V
Figure 7-29 FAULT
Leakage Current vs Temperature
Figure 7-31 VREF vs Input Voltage
LOUT = 1µH, VSENSE = (VSNS+) –
(VSNS-),
utilizing a
SS10P4-M3/87A Schottky diode
Figure 7-33 VSENSE
vs Output Current at 1MHz
VCOMP = 1V
Figure 7-35 Error
Amplifier Transconductance (gmEA) vs
Temperature
VCOMP = 0.65V, RILIM_TOP =
49.9kΩ, RILIM_BOT = 100kΩ
Figure 7-37 Power
Stage Transconductance (gmps) vs
Temperature at IOC_HS1 = 13.4A
VCOMP = 0.75V, ILIM = GND
Figure 7-39 Power
Stage Transconductance (gmps) vs
Temperature at IOC_HS1 = 5.6A
RSHORT ≈ 4mΩ
Figure 7-41 High-Side Current Limit Threshold 2
(IOC_HS2) vs Temperature
RSC = 1.1MΩ, ILIM = AVDD
Figure 7-43 Slope
Compensation vs Temperature at 100kHz
RSC = 196kΩ, ILIM = AVDD
Figure 7-45 Slope
Compensation vs Temperature at 1MHz
RRT = 511kΩ
Figure 7-47 Switching Frequency vs Input Voltage
SYNC2 =
AVDD, SYNCM = AVDD
Figure 7-49 SYNC1
to SW Delay (Non-inverted Input) vs Input
Voltage
SYNC2 =
GND, SYNCM = AVDD
Figure 7-51 SYNC1
to SW Delay (Inverted Input) vs Input
Voltage
SYNCM =
GND
Figure 7-53 SYNC1
to SW Delay (Output) vs Input Voltage
10% to
90% of VIN, ISW = 2A
Figure 7-55 Minimum On Time vs Input Voltage
CSS = 22nF
Figure 7-57 Soft
Start Time vs Temperature
IPWRGD(SINK) = 2mA
Figure 7-59 Power
Good Output Low vs Temperature
Figure 7-61 Low
Side FET Resistance vs Current 
ILS = 12A
Figure 7-63 Low
Side FET Resistance vs Temperature 
Slew
Rate = 225A/µs, VOUT = 3.3V, fSW =
500kHz,
COUT = 1013µF
Figure 7-65 Load
Step: 0.6A to 10.5A
Note: LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-2 Efficiency vs Load Across VOUT at
VIN = 12V,
100kHz
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-4 Efficiency vs Load Across VOUT at
VIN = 12V,
500kHz
LOUT = 1µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-6 Efficiency vs Load Across VOUT at
VIN = 12V, 1MHz
LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-8 Efficiency vs Load Across
Temperature at 100kHz,
VIN = 5V, VOUT = 1.8V
LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-10 Efficiency vs Load Across
Temperature at 100kHz,
VIN = 12V, VOUT = 5V
LOUT = 15µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-12 Efficiency vs Load Across Temperature at 100kHz,
VIN = 12V, VOUT = 1.8V
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-14 Efficiency vs Load Across Temperature at 500kHz,
VIN = 5V, VOUT = 1.8V
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-16 Efficiency vs Load Across Temperature at 500kHz,
VIN = 12V, VOUT = 5V
LOUT = 2.2µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-18 Efficiency vs Load Across Temperature at 500kHz,
VIN = 12V, VOUT = 1.8V
LOUT = 1µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-20 Efficiency vs Load Across Temperature at 1MHz, VIN
= 5V, VOUT = 1.8V
LOUT = 1µH, dashed lines are the
plastic package (HTSSOP)
Figure 7-22 Efficiency vs Load Across Temperature at 1MHz, VIN
= 12V, VOUT = 3.3V
LOUT = 3.3µH
Figure 7-24 Low
Current Efficiency vs Load Across Temperature at
500kHz, VIN = 12V,
VOUT = 2.5V
VEN = 0V
Figure 7-26 VIN
Shutdown Current vs Temperature
VEN = 7V, VSENSE =
1V
Figure 7-28 VIN
Quiescent Current (Non-switching) vs
Temperature
VSNS+ =
0.6V
Figure 7-30 VSNS+
Leakage Current vs Temperature
LOUT = 2.2µH, VSENSE = (VSNS+) –
(VSNS-),
utilizing a
SS10P4-M3/87A Schottky diode
Figure 7-32 VSENSE
vs Output Current at 500kHz
LOUT =
2.2µH, VSENSE = (VSNS+) – (VSNS-),
utilizing a
SS10P4-M3/87A Schottky diode
Figure 7-34 VSENSE
vs Temperature at 500kHz
VCOMP = 0.6V, ILIM = AVDD
Figure 7-36 Power
Stage Transconductance (gmps) vs
Temperature at IOC_HS1 = 18.3A
VCOMP = 0.7V, RILIM_TOP =
100kΩ, RILIM_BOT = 49.9kΩ
Figure 7-38 Power
Stage Transconductance (gmps) vs
Temperature at IOC_HS1 = 9A
RSHORT = 100mΩ
Figure 7-40 High-Side Current Limit Threshold 1
(IOC_HS1) vs Temperature
Figure 7-42 Low-Side Sinking Current Limit Threshold
(IOC_LS(sink)) vs Temperature
RSC = 196kΩ, ILIM = AVDD
Figure 7-44 Slope
Compensation vs Temperature at 500kHz
RSC = 196kΩ, ILIM = AVDD,
fSW = 500kHz
Figure 7-46 Slope Compensation vs Input Voltage
RRT = 511kΩ
Figure 7-48 Switching Frequency vs Temperature
SYNC2 =
AVDD, SYNCM = AVDD
Figure 7-50 SYNC1
to SW Delay (Non-inverted Input) vs Output
Current
SYNC2 =
GND, SYNCM = AVDD
Figure 7-52 SYNC1
to SW Delay (Inverted Input) vs Output
Current
SYNCM =
GND
Figure 7-54 SYNC1
to SW Delay (Output) vs Output Current
50% to
50% of VIN, ISW = 2A
Figure 7-56 Minimum On Time vs Temperature
VSENSE =
VREF, VPWRGD = 7V
Figure 7-58 Power
Good Leakage vs Temperature
Figure 7-60 High
Side FET Resistance vs Current 
IHS = 12A
Figure 7-62 High
Side FET Resistance vs Temperature 
IOUT = 0A, VOUT(set) =
3.3V, fSW = 500kHz, COUT =
1013µF
Figure 7-64 Startup
Slew
Rate = 450A/µs, VOUT = 3.3V, fSW =
500kHz,
COUT = 1013µF
Figure 7-66 Load
Step: 10.6A to 0.6A