SNVSA85D October   2015  – October 2025 LM27761

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout
      2. 6.3.2 Input Current Limit
      3. 6.3.3 PFM Operation
      4. 6.3.4 Output Discharge
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Enable Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application - Regulated Voltage Inverter
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Charge-Pump Voltage Inverter
        2. 7.2.2.2 Negative Low-Dropout Linear Regulator
        3. 7.2.2.3 Power Dissipation
        4. 7.2.2.4 Output Voltage Setting
        5. 7.2.2.5 External Capacitor Selection
          1. 7.2.2.5.1 Charge-Pump Output Capacitor
          2. 7.2.2.5.2 Input Capacitor
          3. 7.2.2.5.3 Flying Capacitor
          4. 7.2.2.5.4 LDO Output Capacitor
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
7.2.2.5.2 Input Capacitor

The input capacitor (C2) is a reservoir of charge that aids in a quick transfer of charge from the supply to the flying capacitors during the charge phase of operation. The input capacitor helps to keep the input voltage from drooping at the start of the charge phase when the flying capacitors are connected to the input. The input capacitor also filters noise on the input pin, keeping this noise out of the sensitive internal analog circuitry that is biased off the input line.

Input capacitance has a dominant and first-order effect on the input ripple magnitude. Increasing (decreasing) the input capacitance results in a proportional decrease (increase) in input voltage ripple. Input voltage, output current, and flying capacitance also affects input ripple levels to some degree.

In typical applications, TI recommends a 4.7-µF low-ESR ceramic capacitor on the input. When operating near the maximum load of 250 mA, after taking into account the DC bias derating, a minimum recommended input capacitance is 2 µF or larger. Different input capacitance values can be used to reduce ripple, shrink the design size, and cut the cost of the design.